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authorAlexandros Frantzis <[email protected]>2019-06-26 12:12:17 +0300
committerChia-I Wu <[email protected]>2019-06-28 04:30:02 +0000
commit6a03f255229b6e96d2bda0ce09bf6b260c9aa43a (patch)
tree7fb1e43910b54cbcfdadcf9c3e14ce633473c6e8 /src/gallium/drivers/virgl/virgl_encode.c
parentbed305fb7a1ad8d887fc6fa64e79e30cbd03bba1 (diff)
virgl: Store the virgl_hw_res for copy transfers
Store the virgl_hw_res instead of the pipe_resource for copy transfer sources. This prepares the codebase for a change to provide only the virgl_hw_res for the staging buffers in upcoming commits. Signed-off-by: Alexandros Frantzis <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
Diffstat (limited to 'src/gallium/drivers/virgl/virgl_encode.c')
-rw-r--r--src/gallium/drivers/virgl/virgl_encode.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/gallium/drivers/virgl/virgl_encode.c b/src/gallium/drivers/virgl/virgl_encode.c
index 2975e6048cf..0489f088012 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -1168,16 +1168,17 @@ void virgl_encode_copy_transfer(struct virgl_context *ctx,
struct virgl_transfer *trans)
{
uint32_t command;
- struct virgl_resource *copy_src_res = virgl_resource(trans->copy_src_res);
struct virgl_screen *vs = virgl_screen(ctx->base.screen);
+ assert(trans->copy_src_hw_res);
+
command = VIRGL_CMD0(VIRGL_CCMD_COPY_TRANSFER3D, 0, VIRGL_COPY_TRANSFER3D_SIZE);
virgl_encoder_write_cmd_dword(ctx, command);
/* Copy transfers need to explicitly specify the stride, since it may differ
* from the image stride.
*/
virgl_encoder_transfer3d_common(vs, ctx->cbuf, trans, virgl_transfer3d_explicit_stride);
- virgl_encoder_emit_resource(vs, ctx->cbuf, copy_src_res);
+ vs->vws->emit_res(vs->vws, ctx->cbuf, trans->copy_src_hw_res, TRUE);
virgl_encoder_write_dword(ctx->cbuf, trans->copy_src_offset);
/* At the moment all copy transfers are synchronized. */
virgl_encoder_write_dword(ctx->cbuf, 1);