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authorChia-I Wu <[email protected]>2019-05-16 14:33:15 -0700
committerChia-I Wu <[email protected]>2019-06-07 22:47:07 +0000
commitf965efb3c8360428532ca65856ff4f447fd0e1a6 (patch)
treee426e3783cf3206f471345cb65bbc31b7869c828 /src/gallium/drivers/virgl/virgl_context.c
parent920c4143f0a47d60e703cf78228fa18a45af1dc4 (diff)
virgl: add SSBOs to virgl_shader_binding_state
It replaces virgl_context::ssbos. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Alexandros Frantzis <[email protected]>
Diffstat (limited to 'src/gallium/drivers/virgl/virgl_context.c')
-rw-r--r--src/gallium/drivers/virgl/virgl_context.c36
1 files changed, 23 insertions, 13 deletions
diff --git a/src/gallium/drivers/virgl/virgl_context.c b/src/gallium/drivers/virgl/virgl_context.c
index 2479690e8d4..3630a17b182 100644
--- a/src/gallium/drivers/virgl/virgl_context.c
+++ b/src/gallium/drivers/virgl/virgl_context.c
@@ -162,13 +162,16 @@ static void virgl_attach_res_shader_buffers(struct virgl_context *vctx,
enum pipe_shader_type shader_type)
{
struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
+ const struct virgl_shader_binding_state *binding =
+ &vctx->shader_bindings[shader_type];
+ uint32_t remaining_mask = binding->ssbo_enabled_mask;
struct virgl_resource *res;
- unsigned i;
- for (i = 0; i < PIPE_MAX_SHADER_BUFFERS; i++) {
- res = virgl_resource(vctx->ssbos[shader_type][i]);
- if (res) {
- vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
- }
+
+ while (remaining_mask) {
+ int i = u_bit_scan(&remaining_mask);
+ res = virgl_resource(binding->ssbos[i].buffer);
+ assert(res);
+ vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
}
}
@@ -1024,17 +1027,19 @@ static void virgl_set_shader_buffers(struct pipe_context *ctx,
{
struct virgl_context *vctx = virgl_context(ctx);
struct virgl_screen *rs = virgl_screen(ctx->screen);
+ struct virgl_shader_binding_state *binding =
+ &vctx->shader_bindings[shader];
+ binding->ssbo_enabled_mask &= ~u_bit_consecutive(start_slot, count);
for (unsigned i = 0; i < count; i++) {
unsigned idx = start_slot + i;
-
- if (buffers) {
- if (buffers[i].buffer) {
- pipe_resource_reference(&vctx->ssbos[shader][idx], buffers[i].buffer);
- continue;
- }
+ if (buffers && buffers[i].buffer) {
+ pipe_resource_reference(&binding->ssbos[idx].buffer, buffers[i].buffer);
+ binding->ssbos[idx] = buffers[i];
+ binding->ssbo_enabled_mask |= 1 << idx;
+ } else {
+ pipe_resource_reference(&binding->ssbos[idx].buffer, NULL);
}
- pipe_resource_reference(&vctx->ssbos[shader][idx], NULL);
}
uint32_t max_shader_buffer = (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE) ?
@@ -1172,6 +1177,11 @@ virgl_release_shader_binding(struct virgl_context *vctx,
int i = u_bit_scan(&binding->ubo_enabled_mask);
pipe_resource_reference(&binding->ubos[i].buffer, NULL);
}
+
+ while (binding->ssbo_enabled_mask) {
+ int i = u_bit_scan(&binding->ssbo_enabled_mask);
+ pipe_resource_reference(&binding->ssbos[i].buffer, NULL);
+ }
}
static void