virgl: handle fence_server_sync in winsys

It does not need help from the driver.  This also fixes one issue where
the fence is ignored when the transfer queue is full.

Signed-off-by: Chia-I Wu <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>

1 files changed, 1 insertions, 5 deletions

diff --git a/src/gallium/drivers/virgl/virgl_context.c b/src/gallium/drivers/virgl/virgl_context.c
index 6f546553204..f9591e214b5 100644
--- a/src/gallium/drivers/virgl/virgl_context.c
+++ b/src/gallium/drivers/virgl/virgl_context.c
@@ -759,7 +759,7 @@ static void virgl_flush_eq(struct virgl_context *ctx, void *closure,
    ctx->num_transfers = ctx->num_draws = ctx->num_compute = 0;
 
    virgl_transfer_queue_clear(&ctx->queue, ctx->cbuf);
-   rs->vws->submit_cmd(rs->vws, ctx->cbuf, ctx->cbuf->in_fence_fd,
+   rs->vws->submit_cmd(rs->vws, ctx->cbuf,
                        ctx->cbuf->needs_out_fence_fd ? &out_fence_fd : NULL);
 
    if (fence)
@@ -786,10 +786,6 @@ static void virgl_flush_from_st(struct pipe_context *ctx,
 
    virgl_flush_eq(vctx, vctx, fence);
 
-   if (vctx->cbuf->in_fence_fd != -1) {
-      close(vctx->cbuf->in_fence_fd);
-      vctx->cbuf->in_fence_fd = -1;
-   }
    vctx->cbuf->needs_out_fence_fd = false;
 }