diff options
author | Eric Anholt <[email protected]> | 2018-01-22 09:14:25 +0800 |
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committer | Eric Anholt <[email protected]> | 2018-02-02 16:50:02 -0800 |
commit | 2e746bc63d1ab56c6006f328c21a77dc69d0b9a8 (patch) | |
tree | abda559ab31fc18187638c4572b5f02535ff9948 /src/gallium/drivers/vc5/vc5_state.c | |
parent | 6a862b0de711955902d4d58f1b0c6063e76207a6 (diff) |
broadcom/vc5: Enable UIF XOR on textures.
This should increase performance by reducing SDRAM bank conflicts when
crossing between UIF columns (particularly on power-of-two height
textures).
The uif_xor_disable setup is dropped, since we need to allow XOR on lower
miplevels even when level 0 is XOR. The level 0 force UIF and level 0 XOR
flags should handle setting XOR properly on imported buffers.
Diffstat (limited to 'src/gallium/drivers/vc5/vc5_state.c')
-rw-r--r-- | src/gallium/drivers/vc5/vc5_state.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/gallium/drivers/vc5/vc5_state.c b/src/gallium/drivers/vc5/vc5_state.c index a055d252b65..9d4d0893f8b 100644 --- a/src/gallium/drivers/vc5/vc5_state.c +++ b/src/gallium/drivers/vc5/vc5_state.c @@ -773,9 +773,6 @@ vc5_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc, cso->format); } - tex.uif_xor_disable = (rsc->slices[0].tiling == - VC5_TILING_UIF_NO_XOR); - /* Since other platform devices may produce UIF images even * when they're not big enough for V3D to assume they're UIF, * we force images with level 0 as UIF to be always treated |