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authorEric Anholt <[email protected]>2018-03-23 16:18:02 -0700
committerEric Anholt <[email protected]>2018-03-26 17:46:19 -0700
commit1bf466270d416643e8fcacd6b790e53660303059 (patch)
tree3ae25f7ebdd170df7afd3aa1ac4d2e82022673ce /src/gallium/drivers/vc5/vc5_state.c
parent262208eb3c2c53a1fd807bc76b12088f6ce2c56d (diff)
broadcom/vc5: Fix EZ disabling and allow using GT/GE direction as well.
Once we've disabled EZ for some draws, we need to not use EZ on future draws. Implementing that made implementing the GT/GE direction trivial. Fixes KHR-GLES3.shaders.fragdepth.compare.no_write on V3D 4.1 simulation.
Diffstat (limited to 'src/gallium/drivers/vc5/vc5_state.c')
-rw-r--r--src/gallium/drivers/vc5/vc5_state.c40
1 files changed, 28 insertions, 12 deletions
diff --git a/src/gallium/drivers/vc5/vc5_state.c b/src/gallium/drivers/vc5/vc5_state.c
index 75cd948e4a3..ba2d748ba94 100644
--- a/src/gallium/drivers/vc5/vc5_state.c
+++ b/src/gallium/drivers/vc5/vc5_state.c
@@ -158,19 +158,35 @@ vc5_create_depth_stencil_alpha_state(struct pipe_context *pctx,
so->base = *cso;
if (cso->depth.enabled) {
- /* We only handle early Z in the < direction because otherwise
- * we'd have to runtime guess which direction to set in the
- * render config.
+ switch (cso->depth.func) {
+ case PIPE_FUNC_LESS:
+ case PIPE_FUNC_LEQUAL:
+ so->ez_state = VC5_EZ_LT_LE;
+ break;
+ case PIPE_FUNC_GREATER:
+ case PIPE_FUNC_GEQUAL:
+ so->ez_state = VC5_EZ_GT_GE;
+ break;
+ case PIPE_FUNC_NEVER:
+ case PIPE_FUNC_EQUAL:
+ so->ez_state = VC5_EZ_UNDECIDED;
+ break;
+ default:
+ so->ez_state = VC5_EZ_DISABLED;
+ break;
+ }
+
+ /* If stencil is enabled and it's not a no-op, then it would
+ * break EZ updates.
*/
- so->early_z_enable =
- ((cso->depth.func == PIPE_FUNC_LESS ||
- cso->depth.func == PIPE_FUNC_LEQUAL) &&
- (!cso->stencil[0].enabled ||
- (cso->stencil[0].zfail_op == PIPE_STENCIL_OP_KEEP &&
- cso->stencil[0].func == PIPE_FUNC_ALWAYS &&
- (!cso->stencil[1].enabled ||
- (cso->stencil[1].zfail_op == PIPE_STENCIL_OP_KEEP &&
- cso->stencil[1].func == PIPE_FUNC_ALWAYS)))));
+ if (cso->stencil[0].enabled &&
+ (cso->stencil[0].zfail_op != PIPE_STENCIL_OP_KEEP ||
+ cso->stencil[0].func != PIPE_FUNC_ALWAYS ||
+ (cso->stencil[1].enabled &&
+ (cso->stencil[1].zfail_op != PIPE_STENCIL_OP_KEEP &&
+ cso->stencil[1].func != PIPE_FUNC_ALWAYS)))) {
+ so->ez_state = VC5_EZ_DISABLED;
+ }
}
const struct pipe_stencil_state *front = &cso->stencil[0];