diff options
| author | Eric Anholt <[email protected]> | 2017-10-05 15:40:18 -0700 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2017-10-10 11:42:06 -0700 |
| commit | c0561808c0442a10a47707cfc9f002e195316552 (patch) | |
| tree | 30f1cdc26ee7eaaf5b191136280b9293bed7a3d7 /src/gallium/drivers/vc5/vc5_rcl.c | |
| parent | 5208d2889e36831e27b7b943b6b1a9dcf4368009 (diff) | |
broadcom/vc5: Set up per-MRT clear colors.
Fixes fbo-mrt-alphatest.
Diffstat (limited to 'src/gallium/drivers/vc5/vc5_rcl.c')
| -rw-r--r-- | src/gallium/drivers/vc5/vc5_rcl.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/src/gallium/drivers/vc5/vc5_rcl.c b/src/gallium/drivers/vc5/vc5_rcl.c index ebc77dcce06..83b383acd1a 100644 --- a/src/gallium/drivers/vc5/vc5_rcl.c +++ b/src/gallium/drivers/vc5/vc5_rcl.c @@ -147,6 +147,13 @@ vc5_emit_rcl(struct vc5_job *job) if (job->resolve & PIPE_CLEAR_COLOR0 << i) rsc->writes++; } + + cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_CLEAR_COLORS_PART1, + clear) { + clear.clear_color_low_32_bits = job->clear_color[i][0]; + clear.clear_color_next_24_bits = job->clear_color[i][1] & 0xffffff; + clear.render_target_number = i; + }; } /* TODO: Don't bother emitting if we don't load/clear Z/S. */ @@ -174,11 +181,6 @@ vc5_emit_rcl(struct vc5_job *job) rsc->writes++; } - cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_CLEAR_COLORS_PART1, - clear) { - clear.clear_color_low_32_bits = job->clear_color[0]; - }; - /* Ends rendering mode config. */ cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_Z_STENCIL_CLEAR_VALUES, clear) { |