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| author | Kenneth Graunke <[email protected]> | 2018-01-20 01:28:07 -0800 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2018-01-20 01:31:25 -0800 |
| commit | 60d8fe9216d68aff1b00fdc8bc2e066ea45aac1e (patch) | |
| tree | 840cb7fe465b12bf84b7bfba982baf1d246bae62 /src/gallium/drivers/vc5/meson.build | |
| parent | 436ed65d38d4ed8b2a7b40fb2adeb15fb0d3989f (diff) | |
i965: Delete completely bogus comment
This hasn't been true in 6+ years, if it was even true then. Before
we rewrote the compiler and introduced GLSL IR in 2010-2011, i965 used
to have two compiler backends for WM programs, based on Mesa IR. One
handled flow control and was SIMD8-only, while the other was SIMD16
only and didn't handle flow control. Or something like that.
Even then, this certainly didn't handle vertex shaders, so "all ...
code generation" is a bit strong.
Diffstat (limited to 'src/gallium/drivers/vc5/meson.build')
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