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authorEric Anholt <[email protected]>2017-01-06 10:51:22 -0800
committerEric Anholt <[email protected]>2017-01-26 12:23:31 -0800
commit347b69e7d74f61f3b08853ccdfad72bdae683e12 (patch)
tree2fb7d2e303c3025a68d6ee4182c6e0a775f010ea /src/gallium/drivers/vc4/vc4_tiling.c
parent14cf5c60b8274cf1a454c4d00b71cf9935494425 (diff)
vc4: Move LT tiling code to a separate file.
This paves the way for building it twice, with NEON assembly or not.
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_tiling.c')
-rw-r--r--src/gallium/drivers/vc4/vc4_tiling.c80
1 files changed, 0 insertions, 80 deletions
diff --git a/src/gallium/drivers/vc4/vc4_tiling.c b/src/gallium/drivers/vc4/vc4_tiling.c
index bf3861c7158..07e1c9c5f67 100644
--- a/src/gallium/drivers/vc4/vc4_tiling.c
+++ b/src/gallium/drivers/vc4/vc4_tiling.c
@@ -52,22 +52,6 @@
#include "vc4_context.h"
#include "vc4_tiling.h"
-/** Returns the stride in bytes of a 64-byte microtile. */
-static uint32_t
-vc4_utile_stride(int cpp)
-{
- switch (cpp) {
- case 1:
- return 8;
- case 2:
- case 4:
- case 8:
- return 16;
- default:
- unreachable("bad cpp");
- }
-}
-
/**
* The texture unit decides what tiling format a particular miplevel is using
* this function, so we lay out our miptrees accordingly.
@@ -80,28 +64,6 @@ vc4_size_is_lt(uint32_t width, uint32_t height, int cpp)
}
static void
-vc4_load_utile(void *dst, void *src, uint32_t dst_stride, uint32_t cpp)
-{
- uint32_t src_stride = vc4_utile_stride(cpp);
-
- for (uint32_t src_offset = 0; src_offset < 64; src_offset += src_stride) {
- memcpy(dst, src + src_offset, src_stride);
- dst += dst_stride;
- }
-}
-
-static void
-vc4_store_utile(void *dst, void *src, uint32_t src_stride, uint32_t cpp)
-{
- uint32_t dst_stride = vc4_utile_stride(cpp);
-
- for (uint32_t dst_offset = 0; dst_offset < 64; dst_offset += dst_stride) {
- memcpy(dst + dst_offset, src, dst_stride);
- src += src_stride;
- }
-}
-
-static void
check_box_utile_alignment(const struct pipe_box *box, int cpp)
{
assert(!(box->x & (vc4_utile_width(cpp) - 1)));
@@ -110,48 +72,6 @@ check_box_utile_alignment(const struct pipe_box *box, int cpp)
assert(!(box->height & (vc4_utile_height(cpp) - 1)));
}
-static void
-vc4_load_lt_image(void *dst, uint32_t dst_stride,
- void *src, uint32_t src_stride,
- int cpp, const struct pipe_box *box)
-{
- uint32_t utile_w = vc4_utile_width(cpp);
- uint32_t utile_h = vc4_utile_height(cpp);
- uint32_t xstart = box->x;
- uint32_t ystart = box->y;
-
- for (uint32_t y = 0; y < box->height; y += utile_h) {
- for (int x = 0; x < box->width; x += utile_w) {
- vc4_load_utile(dst + (dst_stride * y +
- x * cpp),
- src + ((ystart + y) * src_stride +
- (xstart + x) * 64 / utile_w),
- dst_stride, cpp);
- }
- }
-}
-
-static void
-vc4_store_lt_image(void *dst, uint32_t dst_stride,
- void *src, uint32_t src_stride,
- int cpp, const struct pipe_box *box)
-{
- uint32_t utile_w = vc4_utile_width(cpp);
- uint32_t utile_h = vc4_utile_height(cpp);
- uint32_t xstart = box->x;
- uint32_t ystart = box->y;
-
- for (uint32_t y = 0; y < box->height; y += utile_h) {
- for (int x = 0; x < box->width; x += utile_w) {
- vc4_store_utile(dst + ((ystart + y) * dst_stride +
- (xstart + x) * 64 / utile_w),
- src + (src_stride * y +
- x * cpp),
- src_stride, cpp);
- }
- }
-}
-
/**
* Takes a utile x and y (and the number of utiles of width of the image) and
* returns the offset to the utile within a VC4_TILING_FORMAT_TF image.