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authorEric Anholt <[email protected]>2015-06-15 17:47:12 -0700
committerEric Anholt <[email protected]>2015-06-16 15:15:14 -0700
commitd4d27361499cac73da4716b571519ecb71cef551 (patch)
treec1b0223e9eaa92e0df2daf9495dee3daf99532b4 /src/gallium/drivers/vc4/vc4_qpu_emit.c
parent507f3e708cbd10a4272aeffa0f066f1a80b48239 (diff)
vc4: Swap around which src we spill to ra31/rb31.
I wanted to assert that src1 came from a non-unspilled register in shader validation, and this easily gets us that. And, as a bonus: total instructions in shared programs: 93347 -> 92723 (-0.67%) instructions in affected programs: 60524 -> 59900 (-1.03%)
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_qpu_emit.c')
-rw-r--r--src/gallium/drivers/vc4/vc4_qpu_emit.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/vc4/vc4_qpu_emit.c b/src/gallium/drivers/vc4/vc4_qpu_emit.c
index 577eb9200f4..99afe4b8798 100644
--- a/src/gallium/drivers/vc4/vc4_qpu_emit.c
+++ b/src/gallium/drivers/vc4/vc4_qpu_emit.c
@@ -117,11 +117,11 @@ fixup_raddr_conflict(struct vc4_compile *c,
return;
if (mux0 == QPU_MUX_A) {
- queue(c, qpu_a_MOV(qpu_rb(31), *src1));
- *src1 = qpu_rb(31);
+ queue(c, qpu_a_MOV(qpu_rb(31), *src0));
+ *src0 = qpu_rb(31);
} else {
- queue(c, qpu_a_MOV(qpu_ra(31), *src1));
- *src1 = qpu_ra(31);
+ queue(c, qpu_a_MOV(qpu_ra(31), *src0));
+ *src0 = qpu_ra(31);
}
}