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authorEric Anholt <[email protected]>2016-03-15 13:43:54 -0700
committerEric Anholt <[email protected]>2016-07-12 17:42:38 -0700
commitc73aa0a09b996feff5aec42e0347b99b35b2f981 (patch)
tree1b1f53fca7af3e18f7361ccef58eeb0fa85350e9 /src/gallium/drivers/vc4/vc4_qpu.h
parent6d343450014e86e22f1d067d79c6fff524d4c8d1 (diff)
vc4: Add QPU support for generating BRANCH instructions.
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_qpu.h')
-rw-r--r--src/gallium/drivers/vc4/vc4_qpu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/drivers/vc4/vc4_qpu.h b/src/gallium/drivers/vc4/vc4_qpu.h
index 83fa36e6b2c..a0aac1587de 100644
--- a/src/gallium/drivers/vc4/vc4_qpu.h
+++ b/src/gallium/drivers/vc4/vc4_qpu.h
@@ -143,6 +143,7 @@ uint64_t qpu_m_alu2(enum qpu_op_mul op, struct qpu_reg dst,
struct qpu_reg src0, struct qpu_reg src1) ATTRIBUTE_CONST;
uint64_t qpu_merge_inst(uint64_t a, uint64_t b) ATTRIBUTE_CONST;
uint64_t qpu_load_imm_ui(struct qpu_reg dst, uint32_t val) ATTRIBUTE_CONST;
+uint64_t qpu_branch(uint32_t cond, uint32_t target) ATTRIBUTE_CONST;
uint64_t qpu_set_sig(uint64_t inst, uint32_t sig) ATTRIBUTE_CONST;
uint64_t qpu_set_cond_add(uint64_t inst, uint32_t cond) ATTRIBUTE_CONST;
uint64_t qpu_set_cond_mul(uint64_t inst, uint32_t cond) ATTRIBUTE_CONST;
@@ -238,4 +239,7 @@ vc4_qpu_validate(uint64_t *insts, uint32_t num_inst);
void
vc4_qpu_disasm_cond(FILE *out, uint32_t cond);
+void
+vc4_qpu_disasm_cond_branch(FILE *out, uint32_t cond);
+
#endif /* VC4_QPU_H */