diff options
| author | Eric Anholt <[email protected]> | 2015-04-13 21:36:24 -0700 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2015-08-14 11:39:18 -0700 |
| commit | bf3c50fba221f216e38d3f60f89161ced4c684c0 (patch) | |
| tree | 27547a49c8ed44d54f4f02031fa70118160a2ab7 /src/gallium/drivers/vc4/vc4_qir.h | |
| parent | 38c6c0f5b499e2bcff2cc9607f67c0f1836f305b (diff) | |
vc4: Move all of our fixed function fragment color handling to NIR.
This massively reduces our dependency on VC4-specific optimization passes.
shader-db:
total uniforms in shared programs: 32077 -> 32067 (-0.03%)
uniforms in affected programs: 149 -> 139 (-6.71%)
total instructions in shared programs: 98208 -> 98182 (-0.03%)
instructions in affected programs: 2154 -> 2128 (-1.21%)
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_qir.h')
| -rw-r--r-- | src/gallium/drivers/vc4/vc4_qir.h | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/src/gallium/drivers/vc4/vc4_qir.h b/src/gallium/drivers/vc4/vc4_qir.h index 57e25de1b94..cade795c12a 100644 --- a/src/gallium/drivers/vc4/vc4_qir.h +++ b/src/gallium/drivers/vc4/vc4_qir.h @@ -39,6 +39,8 @@ #include "vc4_screen.h" #include "pipe/p_state.h" +struct nir_builder; + enum qfile { QFILE_NULL, QFILE_TEMP, @@ -242,7 +244,11 @@ enum quniform_contents { QUNIFORM_TEXTURE_BORDER_COLOR, - QUNIFORM_BLEND_CONST_COLOR, + QUNIFORM_BLEND_CONST_COLOR_X, + QUNIFORM_BLEND_CONST_COLOR_Y, + QUNIFORM_BLEND_CONST_COLOR_Z, + QUNIFORM_BLEND_CONST_COLOR_W, + QUNIFORM_STENCIL, QUNIFORM_ALPHA_REF, @@ -414,6 +420,11 @@ struct vc4_compile { uint32_t variant_id; }; +/* Special nir_load_input intrinsic index for loading the current TLB + * destination color. + */ +#define VC4_NIR_TLB_COLOR_READ_INPUT 2000000000 + /* Special offset for nir_load_uniform values to get a QUNIFORM_* * state-dependent value. */ @@ -458,9 +469,12 @@ bool qir_opt_cse(struct vc4_compile *c); bool qir_opt_dead_code(struct vc4_compile *c); bool qir_opt_small_immediates(struct vc4_compile *c); bool qir_opt_vpm_writes(struct vc4_compile *c); +void vc4_nir_lower_blend(struct vc4_compile *c); void vc4_nir_lower_io(struct vc4_compile *c); nir_ssa_def *vc4_nir_get_state_uniform(struct nir_builder *b, enum quniform_contents contents); +nir_ssa_def *vc4_nir_get_swizzled_channel(struct nir_builder *b, + nir_ssa_def **srcs, int swiz); void qir_lower_uniforms(struct vc4_compile *c); void qpu_schedule_instructions(struct vc4_compile *c); |