vc4: Make SF be a flag on the QIR instructions.

Right now the places that used to emit a mov.sf just put the SF on the
previous instruction when it generated the source of the SF value.  Even
without optimization to push the sf up further (and kill thus potentially
kill more MOVs), this gets us:

total uniforms in shared programs: 13455 -> 13457 (0.01%)
uniforms in affected programs:     3 -> 5 (66.67%)
total instructions in shared programs: 40296 -> 40198 (-0.24%)
instructions in affected programs:     12595 -> 12497 (-0.78%)

1 files changed, 4 insertions, 4 deletions

diff --git a/src/gallium/drivers/vc4/vc4_qir.h b/src/gallium/drivers/vc4/vc4_qir.h
index ee869940954..6da6ff6542e 100644
--- a/src/gallium/drivers/vc4/vc4_qir.h
+++ b/src/gallium/drivers/vc4/vc4_qir.h
@@ -24,6 +24,7 @@
 #ifndef VC4_QIR_H
 #define VC4_QIR_H
 
+#include <assert.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <stdbool.h>
@@ -76,9 +77,6 @@ enum qop {
         QOP_XOR,
         QOP_NOT,
 
-        /* Sets the flag register according to src. */
-        QOP_SF,
-
         /* Note: Orderings of these compares must be the same as in
          * qpu_defines.h.  Selects the src[0] if the ns flag bit is set,
          * otherwise 0. */
@@ -173,6 +171,7 @@ struct qinst {
         enum qop op;
         struct qreg dst;
         struct qreg *src;
+        bool sf;
 };
 
 enum qstage {
@@ -397,6 +396,8 @@ bool qir_opt_vpm_writes(struct vc4_compile *c);
 
 void qpu_schedule_instructions(struct vc4_compile *c);
 
+void qir_SF(struct vc4_compile *c, struct qreg src);
+
 #define QIR_ALU0(name)                                                   \
 static inline struct qreg                                                \
 qir_##name(struct vc4_compile *c)                                        \
@@ -443,7 +444,6 @@ QIR_ALU2(FADD)
 QIR_ALU2(FSUB)
 QIR_ALU2(FMUL)
 QIR_ALU2(MUL24)
-QIR_NODST_1(SF)
 QIR_ALU1(SEL_X_0_ZS)
 QIR_ALU1(SEL_X_0_ZC)
 QIR_ALU1(SEL_X_0_NS)