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authorEric Anholt <[email protected]>2014-11-26 12:44:19 -0800
committerEric Anholt <[email protected]>2014-12-01 11:00:23 -0800
commit3fe4d8e1e39b47c9c5c4bfdd87300abd0c336a7e (patch)
tree5ac8c5cee06176519262f90dabb3d304c120f655 /src/gallium/drivers/vc4/vc4_qir.h
parent6958c404caf3f4b2219ef686e2beeeaf48664905 (diff)
vc4: Introduce scheduling of QPU instructions.
This doesn't reschedule much currently, just tries to fit things into the regfile A/B write-versus-read slots (the cause of the improvements in shader-db), and hide texture fetch latency by scheduling setup early and results collection late (haven't performance tested it). This infrastructure will be important for doing instruction pairing, though. shader-db2 results: total instructions in shared programs: 61874 -> 59583 (-3.70%) instructions in affected programs: 50677 -> 48386 (-4.52%)
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_qir.h')
-rw-r--r--src/gallium/drivers/vc4/vc4_qir.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/gallium/drivers/vc4/vc4_qir.h b/src/gallium/drivers/vc4/vc4_qir.h
index cb02db5272c..0b76a2f246e 100644
--- a/src/gallium/drivers/vc4/vc4_qir.h
+++ b/src/gallium/drivers/vc4/vc4_qir.h
@@ -148,6 +148,11 @@ struct simple_node {
struct simple_node *prev;
};
+struct queued_qpu_inst {
+ struct simple_node link;
+ uint64_t inst;
+};
+
struct qinst {
struct simple_node link;
@@ -368,6 +373,8 @@ bool qir_opt_copy_propagation(struct vc4_compile *c);
bool qir_opt_cse(struct vc4_compile *c);
bool qir_opt_dead_code(struct vc4_compile *c);
+void qpu_schedule_instructions(struct vc4_compile *c);
+
#define QIR_ALU0(name) \
static inline struct qreg \
qir_##name(struct vc4_compile *c) \