diff options
| author | Eric Anholt <[email protected]> | 2014-07-01 10:10:37 -0700 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2014-08-08 18:59:46 -0700 |
| commit | 6cf86dd48786b08991714c338c6b506dde5f75bb (patch) | |
| tree | 584955a97cebe104e3eac4eef35944adae182dcc /src/gallium/drivers/vc4/vc4_packet.h | |
| parent | c3f96060a8d1ebc9caa7053592e80155a5266e92 (diff) | |
vc4: Load the tile buffer before incrementally drawing.
We will want to occasionally disable this again when we do clear support.
v2: Squash with the previous commit (I accidentally committed at two
stages of writing the change)
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_packet.h')
| -rw-r--r-- | src/gallium/drivers/vc4/vc4_packet.h | 47 |
1 files changed, 28 insertions, 19 deletions
diff --git a/src/gallium/drivers/vc4/vc4_packet.h b/src/gallium/drivers/vc4/vc4_packet.h index e74411a6a21..cc378667778 100644 --- a/src/gallium/drivers/vc4/vc4_packet.h +++ b/src/gallium/drivers/vc4/vc4_packet.h @@ -76,42 +76,51 @@ enum vc4_packet { } __attribute__ ((__packed__)); /** @{ - * byte 2 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL (low bits of the - * address) + * + * byte 2 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and + * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL (low bits of the address) */ -#define VC4_STORE_TILE_BUFFER_DISABLE_FULL_VG_MASK_DUMP (1 << 2) -#define VC4_STORE_TILE_BUFFER_DISABLE_FULL_ZS_DUMP (1 << 1) -#define VC4_STORE_TILE_BUFFER_DISABLE_FULL_COLOR_DUMP (1 << 0) +#define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_VG_MASK (1 << 2) +#define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_ZS (1 << 1) +#define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_COLOR (1 << 0) /** @} */ -/** @{ byte 1 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL */ +/** @{ + * + * byte 1 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and + * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL + */ #define VC4_STORE_TILE_BUFFER_DISABLE_VG_MASK_CLEAR (1 << 7) #define VC4_STORE_TILE_BUFFER_DISABLE_ZS_CLEAR (1 << 6) #define VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR (1 << 5) #define VC4_STORE_TILE_BUFFER_DISABLE_SWAP (1 << 4) -#define VC4_STORE_TILE_BUFFER_RGBA8888 (0 << 0) -#define VC4_STORE_TILE_BUFFER_BGR565_DITHER (1 << 0) -#define VC4_STORE_TILE_BUFFER_BGR565 (2 << 0) +#define VC4_LOADSTORE_TILE_BUFFER_RGBA8888 (0 << 0) +#define VC4_LOADSTORE_TILE_BUFFER_BGR565_DITHER (1 << 0) +#define VC4_LOADSTORE_TILE_BUFFER_BGR565 (2 << 0) /** @} */ -/** @{ byte 0 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL */ +/** @{ + * + * byte 0 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and + * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL + */ #define VC4_STORE_TILE_BUFFER_MODE_SAMPLE0 (0 << 6) #define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X4 (1 << 6) #define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X16 (2 << 6) -#define VC4_STORE_TILE_BUFFER_FORMAT_RASTER (0 << 4) -#define VC4_STORE_TILE_BUFFER_FORMAT_T (1 << 4) -#define VC4_STORE_TILE_BUFFER_FORMAT_LT (2 << 4) +#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_RASTER (0 << 4) +#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_T (1 << 4) +#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_LT (2 << 4) -#define VC4_STORE_TILE_BUFFER_NONE (0 << 0) -#define VC4_STORE_TILE_BUFFER_COLOR (1 << 0) -#define VC4_STORE_TILE_BUFFER_ZS (2 << 0) -#define VC4_STORE_TILE_BUFFER_Z (3 << 0) -#define VC4_STORE_TILE_BUFFER_VG_MASK (4 << 0) -#define VC4_STORE_TILE_BUFFER_FULL (5 << 0) +#define VC4_LOADSTORE_TILE_BUFFER_NONE (0 << 0) +#define VC4_LOADSTORE_TILE_BUFFER_COLOR (1 << 0) +#define VC4_LOADSTORE_TILE_BUFFER_ZS (2 << 0) +#define VC4_LOADSTORE_TILE_BUFFER_Z (3 << 0) +#define VC4_LOADSTORE_TILE_BUFFER_VG_MASK (4 << 0) +#define VC4_LOADSTORE_TILE_BUFFER_FULL (5 << 0) /** @} */ #define VC4_INDEX_BUFFER_U8 (0 << 4) |