diff options
author | Eric Anholt <eric@anholt.net> | 2014-08-05 11:00:51 -0700 |
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committer | Eric Anholt <eric@anholt.net> | 2014-08-11 14:47:51 -0700 |
commit | a7faca5d2716c5f87f228c6f82eaf10373154852 (patch) | |
tree | d894b56b8f232670b3e665612adcbca420168b15 /src/gallium/drivers/vc4/vc4_draw.c | |
parent | 7050ab510decce2606ffcd0298b3c7fb13a1401e (diff) |
vc4: Clean up the tile alloc buffer size.
This prevents some simulator assertion failures, but it does mean (since
I've dropped the "* 16" padding) that on real hardware you need a kernel
that does overflow memory management (currently, "drm/vc4: Add support for
binner overflow memory allocation." in my kernel tree).
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_draw.c')
-rw-r--r-- | src/gallium/drivers/vc4/vc4_draw.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/gallium/drivers/vc4/vc4_draw.c b/src/gallium/drivers/vc4/vc4_draw.c index 2fb57aaede7..ec218d379e9 100644 --- a/src/gallium/drivers/vc4/vc4_draw.c +++ b/src/gallium/drivers/vc4/vc4_draw.c @@ -45,7 +45,15 @@ vc4_start_draw(struct vc4_context *vc4) uint32_t tilew = align(width, 64) / 64; uint32_t tileh = align(height, 64) / 64; - uint32_t tile_alloc_size = 32 * tilew * tileh * 16; + /* Tile alloc memory setup: We use an initial alloc size of 32b. The + * hardware then aligns that to 256b (we use 4096, because all of our + * BO allocations align to that anyway), then for some reason the + * simulator wants an extra page available, even if you have overflow + * memory set up. + */ + uint32_t tile_alloc_size = 32 * tilew * tileh; + tile_alloc_size = align(tile_alloc_size, 4096); + tile_alloc_size += 4096; uint32_t tile_state_size = 48 * tilew * tileh; if (!vc4->tile_alloc || vc4->tile_alloc->size < tile_alloc_size) { vc4_bo_unreference(&vc4->tile_alloc); |