diff options
author | Eric Anholt <[email protected]> | 2014-07-01 10:10:37 -0700 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2014-08-08 18:59:46 -0700 |
commit | 6cf86dd48786b08991714c338c6b506dde5f75bb (patch) | |
tree | 584955a97cebe104e3eac4eef35944adae182dcc /src/gallium/drivers/vc4/vc4_draw.c | |
parent | c3f96060a8d1ebc9caa7053592e80155a5266e92 (diff) |
vc4: Load the tile buffer before incrementally drawing.
We will want to occasionally disable this again when we do clear support.
v2: Squash with the previous commit (I accidentally committed at two
stages of writing the change)
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_draw.c')
-rw-r--r-- | src/gallium/drivers/vc4/vc4_draw.c | 30 |
1 files changed, 22 insertions, 8 deletions
diff --git a/src/gallium/drivers/vc4/vc4_draw.c b/src/gallium/drivers/vc4/vc4_draw.c index 932ea6535df..1d7956d1d4f 100644 --- a/src/gallium/drivers/vc4/vc4_draw.c +++ b/src/gallium/drivers/vc4/vc4_draw.c @@ -32,8 +32,11 @@ static void vc4_rcl_tile_calls(struct vc4_context *vc4, + struct vc4_surface *csurf, uint32_t xtiles, uint32_t ytiles) { + struct vc4_resource *ctex = vc4_resource(csurf->base.texture); + for (int x = 0; x < xtiles; x++) { for (int y = 0; y < ytiles; y++) { cl_u8(&vc4->rcl, VC4_PACKET_TILE_COORDINATES); @@ -41,6 +44,15 @@ vc4_rcl_tile_calls(struct vc4_context *vc4, cl_u8(&vc4->rcl, y); cl_start_reloc(&vc4->rcl, 1); + cl_u8(&vc4->rcl, VC4_PACKET_LOAD_TILE_BUFFER_GENERAL); + cl_u8(&vc4->rcl, + VC4_LOADSTORE_TILE_BUFFER_COLOR | + VC4_LOADSTORE_TILE_BUFFER_FORMAT_RASTER); + cl_u8(&vc4->rcl, + VC4_LOADSTORE_TILE_BUFFER_RGBA8888); + cl_reloc(vc4, &vc4->rcl, ctex->bo, csurf->offset); + + cl_start_reloc(&vc4->rcl, 1); cl_u8(&vc4->rcl, VC4_PACKET_BRANCH_TO_SUB_LIST); cl_reloc(vc4, &vc4->rcl, vc4->tile_alloc, (y * xtiles + x) * 32); @@ -222,15 +234,17 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info) // Do a store of the first tile to force the tile buffer to be cleared /* XXX: I think these two packets may be unnecessary. */ - cl_u8(&vc4->rcl, VC4_PACKET_TILE_COORDINATES); - cl_u8(&vc4->rcl, 0); - cl_u8(&vc4->rcl, 0); - - cl_u8(&vc4->rcl, VC4_PACKET_STORE_TILE_BUFFER_GENERAL); - cl_u16(&vc4->rcl, 0); // Store nothing (just clear) - cl_u32(&vc4->rcl, 0); // no address is needed + if (0) { + cl_u8(&vc4->rcl, VC4_PACKET_TILE_COORDINATES); + cl_u8(&vc4->rcl, 0); + cl_u8(&vc4->rcl, 0); + + cl_u8(&vc4->rcl, VC4_PACKET_STORE_TILE_BUFFER_GENERAL); + cl_u16(&vc4->rcl, 0); // Store nothing (just clear) + cl_u32(&vc4->rcl, 0); // no address is needed + } - vc4_rcl_tile_calls(vc4, tilew, tileh); + vc4_rcl_tile_calls(vc4, csurf, tilew, tileh); vc4_flush(pctx); } |