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authorEric Anholt <[email protected]>2014-06-26 23:07:39 +0100
committerEric Anholt <[email protected]>2014-08-08 18:59:46 -0700
commit792d1c92df6f58f219eb8b77e668424cdcc9c9af (patch)
treeeff4d2ea2c8050a14118274dcb19714c609392ab /src/gallium/drivers/vc4/vc4_context.h
parente59890aebbad990a02c2c27531525804de47115d (diff)
vc4: Switch to actually generating vertex and fragment shader code from TGSI.
This introduces an IR (QIR, for QPU IR) to do optimization on. It's a scalar, SSA IR in general. It looks like optimization is pretty easy this way, though I haven't figured out if it's going to be good for our weird register allocation or not (or if I want to reduce to basically QPU instructions first), and I've got some problems with it having some multi-QPU-instruction opcodes (SEQ and CMP, for example) which I probably want to break down. Of course, this commit mostly doesn't work, since many other things are still hardwired, like the VBO data. v2: Rewrite to use a bunch of helpers (qir_OPCODE) for emitting QIR instructions into temporary values, and make qir_inst4 take the 4 args separately instead of an array (all later callers wanted individual args).
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_context.h')
-rw-r--r--src/gallium/drivers/vc4/vc4_context.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/gallium/drivers/vc4/vc4_context.h b/src/gallium/drivers/vc4/vc4_context.h
index 0c906488756..36ad1bd2c8d 100644
--- a/src/gallium/drivers/vc4/vc4_context.h
+++ b/src/gallium/drivers/vc4/vc4_context.h
@@ -32,6 +32,7 @@
#include "vc4_bufmgr.h"
#include "vc4_resource.h"
#include "vc4_cl.h"
+#include "vc4_qir.h"
#define VC4_DIRTY_BLEND (1 << 0)
#define VC4_DIRTY_RASTERIZER (1 << 1)
@@ -63,10 +64,18 @@ struct vc4_texture_stateobj {
unsigned dirty_samplers;
};
+struct vc4_shader_uniform_info {
+ enum quniform_contents *contents;
+ uint32_t *data;
+ uint32_t count;
+};
+
struct vc4_shader_state {
struct pipe_shader_state base;
struct vc4_bo *bo;
+ struct vc4_shader_uniform_info uniforms[2];
+
uint32_t coord_shader_offset;
};
@@ -173,7 +182,14 @@ void vc4_simulator_flush(struct vc4_context *vc4,
struct vc4_surface *color_surf);
void *vc4_simulator_alloc(struct vc4_screen *screen, uint32_t size);
+void vc4_get_uniform_bo(struct vc4_context *vc4,
+ struct vc4_shader_state *shader,
+ struct vc4_constbuf_stateobj *cb,
+ int shader_index, struct vc4_bo **out_bo,
+ uint32_t *out_offset);
+
void vc4_flush(struct pipe_context *pctx);
void vc4_emit_state(struct pipe_context *pctx);
+void vc4_generate_code(struct qcompile *c);
#endif /* VC4_CONTEXT_H */