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authorEric Anholt <[email protected]>2014-06-26 23:07:39 +0100
committerEric Anholt <[email protected]>2014-08-08 18:59:46 -0700
commit792d1c92df6f58f219eb8b77e668424cdcc9c9af (patch)
treeeff4d2ea2c8050a14118274dcb19714c609392ab /src/gallium/drivers/vc4/Makefile.sources
parente59890aebbad990a02c2c27531525804de47115d (diff)
vc4: Switch to actually generating vertex and fragment shader code from TGSI.
This introduces an IR (QIR, for QPU IR) to do optimization on. It's a scalar, SSA IR in general. It looks like optimization is pretty easy this way, though I haven't figured out if it's going to be good for our weird register allocation or not (or if I want to reduce to basically QPU instructions first), and I've got some problems with it having some multi-QPU-instruction opcodes (SEQ and CMP, for example) which I probably want to break down. Of course, this commit mostly doesn't work, since many other things are still hardwired, like the VBO data. v2: Rewrite to use a bunch of helpers (qir_OPCODE) for emitting QIR instructions into temporary values, and make qir_inst4 take the 4 args separately instead of an array (all later callers wanted individual args).
Diffstat (limited to 'src/gallium/drivers/vc4/Makefile.sources')
-rw-r--r--src/gallium/drivers/vc4/Makefile.sources2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/vc4/Makefile.sources b/src/gallium/drivers/vc4/Makefile.sources
index 294869fe99a..cf464b06315 100644
--- a/src/gallium/drivers/vc4/Makefile.sources
+++ b/src/gallium/drivers/vc4/Makefile.sources
@@ -5,6 +5,8 @@ C_SOURCES := \
vc4_draw.c \
vc4_emit.c \
vc4_program.c \
+ vc4_qir.c \
+ vc4_qpu_emit.c \
vc4_qpu.c \
vc4_qpu_disasm.c \
vc4_qpu_validate.c \