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authorEric Anholt <[email protected]>2018-07-30 13:17:39 -0700
committerEric Anholt <[email protected]>2018-07-30 14:29:01 -0700
commitb56f8c475e5bf6a3b77c597723631ebde4f31358 (patch)
tree58731c4994f85a43730a7a64ffa492ab1e7c9e39 /src/gallium/drivers/v3d/v3dx_rcl.c
parent300e609feb173d40873020c3e250f9257b5f3321 (diff)
v3d: Rename "configuration" and "config" in the XML to "cfg"
This matches what CLIF parsing expects, and makes TILE_BINNING_MODE_CONFIGURATION_COMMON_CONFIGURATION into a much more legible TILE_BINNING_MODE_CFG_COMMON.
Diffstat (limited to 'src/gallium/drivers/v3d/v3dx_rcl.c')
-rw-r--r--src/gallium/drivers/v3d/v3dx_rcl.c21
1 files changed, 10 insertions, 11 deletions
diff --git a/src/gallium/drivers/v3d/v3dx_rcl.c b/src/gallium/drivers/v3d/v3dx_rcl.c
index acd6e9297e4..3a76b0f3b24 100644
--- a/src/gallium/drivers/v3d/v3dx_rcl.c
+++ b/src/gallium/drivers/v3d/v3dx_rcl.c
@@ -457,7 +457,7 @@ static void
v3d_emit_z_stencil_config(struct v3d_job *job, struct v3d_surface *surf,
struct v3d_resource *rsc, bool is_separate_stencil)
{
- cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_Z_STENCIL_CONFIG, zs) {
+ cl_emit(&job->rcl, TILE_RENDERING_MODE_CFG_Z_STENCIL, zs) {
zs.address = cl_address(rsc->bo, surf->offset);
if (!is_separate_stencil) {
@@ -501,12 +501,11 @@ v3dX(emit_rcl)(struct v3d_job *job)
nr_cbufs = i + 1;
}
- /* Comon config must be the first TILE_RENDERING_MODE_CONFIGURATION
+ /* Comon config must be the first TILE_RENDERING_MODE_CFG
* and Z_STENCIL_CLEAR_VALUES must be last. The ones in between are
* optional updates to the previous HW state.
*/
- cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_COMMON_CONFIGURATION,
- config) {
+ cl_emit(&job->rcl, TILE_RENDERING_MODE_CFG_COMMON, config) {
#if V3D_VERSION < 40
config.enable_z_store = job->store & PIPE_CLEAR_DEPTH;
config.enable_stencil_store = job->store & PIPE_CLEAR_STENCIL;
@@ -572,7 +571,7 @@ v3dX(emit_rcl)(struct v3d_job *job)
}
#if V3D_VERSION < 40
- cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_RENDER_TARGET_CONFIG, rt) {
+ cl_emit(&job->rcl, TILE_RENDERING_MODE_CFG_COLOR, rt) {
rt.address = cl_address(rsc->bo, surf->offset);
rt.internal_type = surf->internal_type;
rt.output_image_format = surf->format;
@@ -586,7 +585,7 @@ v3dX(emit_rcl)(struct v3d_job *job)
}
#endif /* V3D_VERSION < 40 */
- cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_CLEAR_COLORS_PART1,
+ cl_emit(&job->rcl, TILE_RENDERING_MODE_CFG_CLEAR_COLORS_PART1,
clear) {
clear.clear_color_low_32_bits = job->clear_color[i][0];
clear.clear_color_next_24_bits = job->clear_color[i][1] & 0xffffff;
@@ -594,7 +593,7 @@ v3dX(emit_rcl)(struct v3d_job *job)
};
if (surf->internal_bpp >= V3D_INTERNAL_BPP_64) {
- cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_CLEAR_COLORS_PART2,
+ cl_emit(&job->rcl, TILE_RENDERING_MODE_CFG_CLEAR_COLORS_PART2,
clear) {
clear.clear_color_mid_low_32_bits =
((job->clear_color[i][1] >> 24) |
@@ -607,7 +606,7 @@ v3dX(emit_rcl)(struct v3d_job *job)
}
if (surf->internal_bpp >= V3D_INTERNAL_BPP_128 || clear_pad) {
- cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_CLEAR_COLORS_PART3,
+ cl_emit(&job->rcl, TILE_RENDERING_MODE_CFG_CLEAR_COLORS_PART3,
clear) {
clear.uif_padded_height_in_uif_blocks = clear_pad;
clear.clear_color_high_16_bits = job->clear_color[i][3] >> 16;
@@ -617,7 +616,7 @@ v3dX(emit_rcl)(struct v3d_job *job)
}
#if V3D_VERSION >= 40
- cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_RENDER_TARGET_CONFIG, rt) {
+ cl_emit(&job->rcl, TILE_RENDERING_MODE_CFG_COLOR, rt) {
v3d_setup_render_target(job, 0,
&rt.render_target_0_internal_bpp,
&rt.render_target_0_internal_type,
@@ -659,7 +658,7 @@ v3dX(emit_rcl)(struct v3d_job *job)
#endif /* V3D_VERSION < 40 */
/* Ends rendering mode config. */
- cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_Z_STENCIL_CLEAR_VALUES,
+ cl_emit(&job->rcl, TILE_RENDERING_MODE_CFG_ZS_CLEAR_VALUES,
clear) {
clear.z_clear_value = job->clear_z;
clear.stencil_clear_value = job->clear_s;
@@ -683,7 +682,7 @@ v3dX(emit_rcl)(struct v3d_job *job)
list.address = cl_address(job->tile_alloc, 0);
}
- cl_emit(&job->rcl, MULTICORE_RENDERING_SUPERTILE_CONFIGURATION, config) {
+ cl_emit(&job->rcl, MULTICORE_RENDERING_SUPERTILE_CFG, config) {
uint32_t frame_w_in_supertiles, frame_h_in_supertiles;
const uint32_t max_supertiles = 256;