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| author | Lionel Landwerlin <[email protected]> | 2018-09-03 15:11:08 +0100 |
|---|---|---|
| committer | Lionel Landwerlin <[email protected]> | 2019-03-07 15:08:32 +0000 |
| commit | 0b3871bc7f4dc89895551ab87ee7b25b166e1a6d (patch) | |
| tree | ac53ca947994e84a509ea5dea7b2609ac4ed8712 /src/gallium/drivers/swr/swr_state.cpp | |
| parent | c1a2c72e76fa5ace071d6ff91654918f562c292c (diff) | |
intel/aub_write: factorize context image/pphwsp/ring creation
We allocate GGTT entries and physical addresses are we create engines
rather than having a fixed layout.
Context images now receive a parameter argument which is used to setup
pml4 & ring buffer addresses.
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Rafael Antognolli <[email protected]>
Diffstat (limited to 'src/gallium/drivers/swr/swr_state.cpp')
0 files changed, 0 insertions, 0 deletions