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authorTim Rowley <[email protected]>2017-12-10 23:54:30 -0600
committerTim Rowley <[email protected]>2017-12-15 10:56:30 -0600
commit01a57c11cb7fe85196b9cb4b5a1555e6eb239297 (patch)
tree318713fe3cefe5bb2e6c1d96e9dd1a7f52e712b2 /src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp
parentfa3105cdb54415d7b93be932351966d3108511e4 (diff)
swr/rast: SIMD16 Fetch - Fully widen 32-bit integer vertex components
Also widen the 16-bit a 8-bit integer vertex component gathers to SIMD16. Reviewed-by: Bruce Cherniak <[email protected]>
Diffstat (limited to 'src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp')
-rw-r--r--src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp36
1 files changed, 36 insertions, 0 deletions
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp b/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp
index 3a486e4c1ea..684c9fac549 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp
@@ -723,6 +723,42 @@ namespace SwrJit
return vGather;
}
+#if USE_SIMD16_BUILDER
+ Value *Builder::GATHERDD_16(Value *vSrc, Value *pBase, Value *vIndices, Value *vMask, uint8_t scale)
+ {
+ Value *vGather = VUNDEF2_F();
+
+ // use avx512 gather instruction if available
+ if (JM()->mArch.AVX512F())
+ {
+ // force mask to <N-bit Integer>, required by vgather2
+ Value *mask = BITCAST(vMask, mInt16Ty);
+
+ vGather = VGATHERDD_16(vSrc, pBase, vIndices, mask, C((uint32_t)scale));
+ }
+ else
+ {
+ Value *src0 = EXTRACT2_F(vSrc, 0);
+ Value *src1 = EXTRACT2_F(vSrc, 1);
+
+ Value *indices0 = EXTRACT2_I(vIndices, 0);
+ Value *indices1 = EXTRACT2_I(vIndices, 1);
+
+ Value *vmask16 = VMASK2(vMask);
+
+ Value *mask0 = MASK(EXTRACT2_I(vmask16, 0)); // TODO: do this better..
+ Value *mask1 = MASK(EXTRACT2_I(vmask16, 1));
+
+ Value *gather0 = GATHERDD(src0, pBase, indices0, mask0, scale);
+ Value *gather1 = GATHERDD(src1, pBase, indices1, mask1, scale);
+
+ vGather = JOIN2(gather0, gather1);
+ }
+
+ return vGather;
+ }
+
+#endif
//////////////////////////////////////////////////////////////////////////
/// @brief Generate a masked gather operation in LLVM IR. If not
/// supported on the underlying platform, emulate it with loads