diff options
author | Tim Rowley <[email protected]> | 2017-07-19 16:16:57 -0500 |
---|---|---|
committer | Tim Rowley <[email protected]> | 2017-08-02 11:39:33 -0500 |
commit | f8a572cdf0cf7fb52348adc7862a7ffc612180ef (patch) | |
tree | 2fe1b17be225346ddd420c1a2d5f40d8399326ea /src/gallium/drivers/swr/rasterizer/common | |
parent | d08493f9cef236af57538d4dd3087277f3a65ad2 (diff) |
swr/rast: disable AVX512 optimization of SSE / AVX code
Disable an optimization which implemented sse/avx operations on avx512
using avx512 intrinsics (to avoid switching between lane widths).
Compile with SIMD_OPT_128_AVX512 / SIMD_OPT_256_AVX512 defined to enable
these optimizations.
Reviewed-by: Bruce Cherniak <[email protected]>
Diffstat (limited to 'src/gallium/drivers/swr/rasterizer/common')
-rw-r--r-- | src/gallium/drivers/swr/rasterizer/common/simdlib.hpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/drivers/swr/rasterizer/common/simdlib.hpp b/src/gallium/drivers/swr/rasterizer/common/simdlib.hpp index 0c79cdd6605..a4b5854d004 100644 --- a/src/gallium/drivers/swr/rasterizer/common/simdlib.hpp +++ b/src/gallium/drivers/swr/rasterizer/common/simdlib.hpp @@ -53,6 +53,7 @@ namespace SIMDImpl #if SIMD_ARCH >= SIMD_ARCH_AVX512 struct AVX512Impl : AVX2Impl { +#if defined(SIMD_OPT_128_AVX512) #define __SIMD_LIB_AVX512_HPP__ #include "simdlib_128_avx512.inl" #if defined(SIMD_ARCH_KNIGHTS) @@ -61,6 +62,7 @@ namespace SIMDImpl #include "simdlib_128_avx512_core.inl" #endif // defined(SIMD_ARCH_KNIGHTS) #undef __SIMD_LIB_AVX512_HPP__ +#endif // SIMD_OPT_128_AVX512 }; // struct AVX2Impl #endif // #if SIMD_ARCH >= SIMD_ARCH_AVX512 @@ -108,6 +110,7 @@ namespace SIMDImpl #if SIMD_ARCH >= SIMD_ARCH_AVX512 struct AVX512Impl : AVX2Impl { +#if defined(SIMD_OPT_256_AVX512) #define __SIMD_LIB_AVX512_HPP__ #include "simdlib_256_avx512.inl" #if defined(SIMD_ARCH_KNIGHTS) @@ -116,6 +119,7 @@ namespace SIMDImpl #include "simdlib_256_avx512_core.inl" #endif // defined(SIMD_ARCH_KNIGHTS) #undef __SIMD_LIB_AVX512_HPP__ +#endif // SIMD_OPT_256_AVX512 }; // struct AVX2Impl #endif // #if SIMD_ARCH >= SIMD_ARCH_AVX512 |