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authorJosé Fonseca <[email protected]>2011-03-17 16:08:21 +0000
committerThomas Hellstrom <[email protected]>2011-07-01 13:30:36 +0200
commit6d58029bf0dbe5606f0bc4aea920767ddd3a06d5 (patch)
tree369e04d1e0b6c3ec06eae32248327cdc173429d1 /src/gallium/drivers/svga
parentc250363022ea2d4d8de1a1660431f35d8b92aca4 (diff)
svga: Flush when switching between HW to SW TNL, after updating need_swtnl.
Also, only flush when going from HW TNL to SW TNL, given it is impossible for the buffers resulting from SWTNL to be ever referred by HW TNL path.
Diffstat (limited to 'src/gallium/drivers/svga')
-rw-r--r--src/gallium/drivers/svga/svga_context.h3
-rw-r--r--src/gallium/drivers/svga/svga_pipe_draw.c23
2 files changed, 15 insertions, 11 deletions
diff --git a/src/gallium/drivers/svga/svga_context.h b/src/gallium/drivers/svga/svga_context.h
index eca529d262e..34b9e85c1a3 100644
--- a/src/gallium/drivers/svga/svga_context.h
+++ b/src/gallium/drivers/svga/svga_context.h
@@ -372,9 +372,6 @@ struct svga_context
/** List of buffers with queued transfers */
struct list_head dirty_buffers;
-
- /** Was the previous draw done with the SW path? */
- boolean prev_draw_swtnl;
};
/* A flag for each state_tracker state object:
diff --git a/src/gallium/drivers/svga/svga_pipe_draw.c b/src/gallium/drivers/svga/svga_pipe_draw.c
index 2093bcae101..a632fb12c94 100644
--- a/src/gallium/drivers/svga/svga_pipe_draw.c
+++ b/src/gallium/drivers/svga/svga_pipe_draw.c
@@ -141,18 +141,11 @@ svga_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
unsigned reduced_prim = u_reduced_prim( info->mode );
unsigned count = info->count;
enum pipe_error ret = 0;
+ boolean needed_swtnl;
if (!u_trim_pipe_prim( info->mode, &count ))
return;
- if (svga->state.sw.need_swtnl != svga->prev_draw_swtnl) {
- /* We're switching between SW and HW drawing. Do a flush to avoid
- * mixing HW and SW rendering with the same vertex buffer.
- */
- pipe->flush(pipe, NULL);
- svga->prev_draw_swtnl = svga->state.sw.need_swtnl;
- }
-
/*
* Mark currently bound target surfaces as dirty
* doesn't really matter if it is done before drawing.
@@ -167,6 +160,8 @@ svga_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
svga->dirty |= SVGA_NEW_REDUCED_PRIMITIVE;
}
+ needed_swtnl = svga->state.sw.need_swtnl;
+
svga_update_state_retry( svga, SVGA_STATE_NEED_SWTNL );
#ifdef DEBUG
@@ -176,6 +171,18 @@ svga_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
#endif
if (svga->state.sw.need_swtnl) {
+ if (!needed_swtnl) {
+ /*
+ * We're switching from HW to SW TNL. SW TNL will require mapping all
+ * currently bound vertex buffers, some of which may already be
+ * referenced in the current command buffer as result of previous HW
+ * TNL. So flush now, to prevent the context to flush while a referred
+ * vertex buffer is mapped.
+ */
+
+ svga_context_flush(svga, NULL);
+ }
+
ret = svga_swtnl_draw_vbo( svga, info );
}
else {