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authorBrian Paul <[email protected]>2012-05-09 10:31:07 -0600
committerBrian Paul <[email protected]>2012-05-09 10:53:15 -0600
commita1c5513c175a2c13594dde7110822b205cabfc14 (patch)
treeaaade0581ace196adf9b1e84f62bb4dff15560f1 /src/gallium/drivers/svga
parentf7665ca4fc2a7bba8378d44d38059fc5dd536223 (diff)
svga: implement CEIL opcode translation
Reviewed-by: José Fonseca <[email protected]>
Diffstat (limited to 'src/gallium/drivers/svga')
-rw-r--r--src/gallium/drivers/svga/svga_tgsi_insn.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/src/gallium/drivers/svga/svga_tgsi_insn.c b/src/gallium/drivers/svga/svga_tgsi_insn.c
index 5e6d1fbc904..a68912608bc 100644
--- a/src/gallium/drivers/svga/svga_tgsi_insn.c
+++ b/src/gallium/drivers/svga/svga_tgsi_insn.c
@@ -871,6 +871,31 @@ static boolean emit_floor(struct svga_shader_emitter *emit,
}
+/* Translate the following TGSI CEIL instruction.
+ * CEIL DST, SRC
+ * To the following SVGA3D instruction sequence.
+ * FRC TMP, -SRC
+ * ADD DST, SRC, TMP
+ */
+static boolean emit_ceil(struct svga_shader_emitter *emit,
+ const struct tgsi_full_instruction *insn)
+{
+ SVGA3dShaderDestToken dst = translate_dst_register(emit, insn, 0);
+ const struct src_register src0 = translate_src_register(emit, &insn->Src[0]);
+ SVGA3dShaderDestToken temp = get_temp(emit);
+
+ /* FRC TMP, -SRC */
+ if (!submit_op1(emit, inst_token(SVGA3DOP_FRC), temp, negate(src0)))
+ return FALSE;
+
+ /* ADD DST, SRC, TMP */
+ if (!submit_op2(emit, inst_token(SVGA3DOP_ADD), dst, src0, src(temp)))
+ return FALSE;
+
+ return TRUE;
+}
+
+
/* Translate the following TGSI CMP instruction.
* CMP DST, SRC0, SRC1, SRC2
* To the following SVGA3D instruction sequence.
@@ -2435,6 +2460,9 @@ static boolean svga_emit_instruction( struct svga_shader_emitter *emit,
case TGSI_OPCODE_TRUNC: /* should be TRUNC, not FLR */
return emit_floor( emit, insn );
+ case TGSI_OPCODE_CEIL:
+ return emit_ceil( emit, insn );
+
case TGSI_OPCODE_CMP:
return emit_cmp( emit, insn );