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authorMarek Olšák <[email protected]>2020-03-20 17:30:33 -0400
committerMarge Bot <[email protected]>2020-03-28 00:58:34 +0000
commitacc5bdf8870e0c47c00028f9f5502de036e79d3d (patch)
treeb3274399af49170372fc1f252309337e58966f8a /src/gallium/drivers/radeonsi
parentee4d797d8b074c27de0e055d2e22b82f642f2359 (diff)
radeonsi/gfx10: fix ds.ordered.add intrinsic for compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_compute_prim_discard.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_compute_prim_discard.c b/src/gallium/drivers/radeonsi/si_compute_prim_discard.c
index ec95ec1214f..7bd14446580 100644
--- a/src/gallium/drivers/radeonsi/si_compute_prim_discard.c
+++ b/src/gallium/drivers/radeonsi/si_compute_prim_discard.c
@@ -240,6 +240,9 @@ si_build_ds_ordered_op(struct si_shader_context *ctx, const char *opcode,
LLVMValueRef m0, LLVMValueRef value, unsigned ordered_count_index,
bool release, bool done)
{
+ if (ctx->screen->info.chip_class >= GFX10)
+ ordered_count_index |= 1 << 24; /* number of dwords == 1 */
+
LLVMValueRef args[] = {
LLVMBuildIntToPtr(ctx->ac.builder, m0,
LLVMPointerType(ctx->ac.i32, AC_ADDR_SPACE_GDS), ""),