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authorMarek Olšák <[email protected]>2017-01-31 00:56:34 +0100
committerMarek Olšák <[email protected]>2017-03-30 14:44:33 +0200
commit405bacd820027a239caca203cf6602da70dc5bbc (patch)
tree2ff7fb3815d5815e7870dcbb4bfb98455fd82742 /src/gallium/drivers/radeonsi
parent354285afa08f48d0aab232820698aacc54e347f7 (diff)
radeonsi/gfx9: fix MIP0_WIDTH & MIP0_HEIGHT for compressed texture blits
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_blit.c8
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c6
2 files changed, 10 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index 24c73d0e8de..cdc9cafa280 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -845,7 +845,7 @@ void si_resource_copy_region(struct pipe_context *ctx,
struct pipe_surface *dst_view, dst_templ;
struct pipe_sampler_view src_templ, *src_view;
unsigned dst_width, dst_height, src_width0, src_height0;
- unsigned src_force_level = 0;
+ unsigned dst_width0, dst_height0, src_force_level = 0;
struct pipe_box sbox, dstbox;
/* Handle buffers first. */
@@ -863,6 +863,8 @@ void si_resource_copy_region(struct pipe_context *ctx,
dst_width = u_minify(dst->width0, dst_level);
dst_height = u_minify(dst->height0, dst_level);
+ dst_width0 = dst->width0;
+ dst_height0 = dst->height0;
src_width0 = src->width0;
src_height0 = src->height0;
@@ -881,6 +883,8 @@ void si_resource_copy_region(struct pipe_context *ctx,
dst_width = util_format_get_nblocksx(dst->format, dst_width);
dst_height = util_format_get_nblocksy(dst->format, dst_height);
+ dst_width0 = util_format_get_nblocksx(dst->format, dst_width0);
+ dst_height0 = util_format_get_nblocksy(dst->format, dst_height0);
src_width0 = util_format_get_nblocksx(src->format, src_width0);
src_height0 = util_format_get_nblocksy(src->format, src_height0);
@@ -904,6 +908,7 @@ void si_resource_copy_region(struct pipe_context *ctx,
dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
dst_width = util_format_get_nblocksx(dst->format, dst_width);
+ dst_width0 = util_format_get_nblocksx(dst->format, dst_width0);
src_width0 = util_format_get_nblocksx(src->format, src_width0);
dstx = util_format_get_nblocksx(dst->format, dstx);
@@ -946,6 +951,7 @@ void si_resource_copy_region(struct pipe_context *ctx,
/* Initialize the surface. */
dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
+ dst_width0, dst_height0,
dst_width, dst_height);
/* Initialize the sampler view. */
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 5d1953fe6b0..1a42ad84f68 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2227,8 +2227,8 @@ static void si_initialize_color_surface(struct si_context *sctx,
surf->cb_color_view |= S_028C6C_MIP_LEVEL(surf->base.u.tex.level);
surf->cb_color_attrib |= S_028C74_MIP0_DEPTH(mip0_depth) |
S_028C74_RESOURCE_TYPE(rtex->surface.u.gfx9.resource_type);
- surf->cb_color_attrib2 = S_028C68_MIP0_WIDTH(rtex->resource.b.b.width0 - 1) |
- S_028C68_MIP0_HEIGHT(rtex->resource.b.b.height0 - 1) |
+ surf->cb_color_attrib2 = S_028C68_MIP0_WIDTH(surf->width0 - 1) |
+ S_028C68_MIP0_HEIGHT(surf->height0 - 1) |
S_028C68_MAX_MIP(rtex->resource.b.b.last_level);
}
@@ -3315,7 +3315,7 @@ si_create_sampler_view_custom(struct pipe_context *ctx,
height = height0;
depth = texture->depth0;
- if (force_level) {
+ if (sctx->b.chip_class <= VI && force_level) {
assert(force_level == first_level &&
force_level == last_level);
base_level = force_level;