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authorEric Anholt <[email protected]>2017-07-27 12:05:56 -0700
committerEric Anholt <[email protected]>2017-10-10 10:45:22 -0700
commitac0051a5075879970f12f614890c9c6d732663b6 (patch)
tree39a723409f8052a04dce2a5b1d2c9bfac2ba6be7 /src/gallium/drivers/radeonsi
parent4aa700e0e09d694ecae60ee04b11ca6e7458afe7 (diff)
gallium: Create a new PIPE_CAP_TILE_RASTER_ORDER for vc4.
Because vc4 can control the order that tiles are rasterized in, we can use it to implement overlapping blits using normal drawing and GL_ARB_texture_barrier, as long as we can tell the kernel what order to render the tiles in. This commit introduces the core gallium support, vc4 changes will follow. v2: Fix on the simulator. v3: Add the cap (disabled) to other drivers, add rst docs for the cap. v4: Rebase on PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS v5: Drop vc4 changes from this commit, for clarity. Reviewed-by: Nicolai Hähnle <[email protected]> (v3)
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 43849877e25..82ed3d7b527 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -589,6 +589,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_UMA:
case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
case PIPE_CAP_POST_DEPTH_COVERAGE:
+ case PIPE_CAP_TILE_RASTER_ORDER:
return 0;
case PIPE_CAP_QUERY_BUFFER_OBJECT: