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authorNicolai Hähnle <[email protected]>2017-05-17 17:46:15 +0200
committerNicolai Hähnle <[email protected]>2017-07-31 14:55:32 +0200
commit29d7bdd179bb5d67a6f8968f0a367264dc654774 (patch)
tree8acc1a5a0f51bb5ee608d102b12be6683329c2c8 /src/gallium/drivers/radeonsi
parent73c7e92d3a28c4c2b7931d981744b2a5d10478b3 (diff)
radeonsi: scan NIR shaders to obtain required info
v2: set num_instruction to 2, i.e. 1 + END (Marek) Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/Makefile.sources1
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.c1
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.h4
-rw-r--r--src/gallium/drivers/radeonsi/si_shader_nir.c312
-rw-r--r--src/gallium/drivers/radeonsi/si_state_shaders.c23
5 files changed, 335 insertions, 6 deletions
diff --git a/src/gallium/drivers/radeonsi/Makefile.sources b/src/gallium/drivers/radeonsi/Makefile.sources
index 626fe6f57ca..1587d646215 100644
--- a/src/gallium/drivers/radeonsi/Makefile.sources
+++ b/src/gallium/drivers/radeonsi/Makefile.sources
@@ -17,6 +17,7 @@ C_SOURCES := \
si_shader.c \
si_shader.h \
si_shader_internal.h \
+ si_shader_nir.c \
si_shader_tgsi_alu.c \
si_shader_tgsi_mem.c \
si_shader_tgsi_setup.c \
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 26ed697319f..3903d163d18 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -5554,6 +5554,7 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx,
struct si_shader_selector *sel = shader->selector;
struct lp_build_tgsi_context *bld_base = &ctx->bld_base;
+ // TODO clean all this up!
switch (ctx->type) {
case PIPE_SHADER_VERTEX:
ctx->load_input = declare_input_vs;
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index 6de7b69cb9f..339e156b168 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -632,6 +632,10 @@ unsigned si_get_spi_shader_z_format(bool writes_z, bool writes_stencil,
bool writes_samplemask);
const char *si_get_shader_name(const struct si_shader *shader, unsigned processor);
+/* si_shader_nir.c */
+void si_nir_scan_shader(const struct nir_shader *nir,
+ struct tgsi_shader_info *info);
+
/* Inline helpers. */
/* Return the pointer to the main shader part's pointer. */
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
new file mode 100644
index 00000000000..9cf032aebaf
--- /dev/null
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -0,0 +1,312 @@
+/*
+ * Copyright 2017 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "si_shader.h"
+
+#include "tgsi/tgsi_from_mesa.h"
+
+#include "compiler/nir/nir.h"
+#include "compiler/nir_types.h"
+
+
+static void scan_instruction(struct tgsi_shader_info *info,
+ nir_instr *instr)
+{
+ if (instr->type == nir_instr_type_alu) {
+ nir_alu_instr *alu = nir_instr_as_alu(instr);
+
+ switch (alu->op) {
+ case nir_op_fddx:
+ case nir_op_fddy:
+ case nir_op_fddx_fine:
+ case nir_op_fddy_fine:
+ case nir_op_fddx_coarse:
+ case nir_op_fddy_coarse:
+ info->uses_derivatives = true;
+ break;
+ default:
+ break;
+ }
+ } else if (instr->type == nir_instr_type_tex) {
+ nir_tex_instr *tex = nir_instr_as_tex(instr);
+
+ switch (tex->op) {
+ case nir_texop_tex:
+ case nir_texop_txb:
+ case nir_texop_lod:
+ info->uses_derivatives = true;
+ break;
+ default:
+ break;
+ }
+ } else if (instr->type == nir_instr_type_intrinsic) {
+ nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
+
+ switch (intr->intrinsic) {
+ case nir_intrinsic_load_front_face:
+ info->uses_frontface = 1;
+ break;
+ case nir_intrinsic_load_instance_id:
+ info->uses_instanceid = 1;
+ break;
+ case nir_intrinsic_load_vertex_id:
+ info->uses_vertexid = 1;
+ break;
+ case nir_intrinsic_load_vertex_id_zero_base:
+ info->uses_vertexid_nobase = 1;
+ break;
+ case nir_intrinsic_load_base_vertex:
+ info->uses_basevertex = 1;
+ break;
+ case nir_intrinsic_load_primitive_id:
+ info->uses_primid = 1;
+ break;
+ case nir_intrinsic_image_store:
+ case nir_intrinsic_image_atomic_add:
+ case nir_intrinsic_image_atomic_min:
+ case nir_intrinsic_image_atomic_max:
+ case nir_intrinsic_image_atomic_and:
+ case nir_intrinsic_image_atomic_or:
+ case nir_intrinsic_image_atomic_xor:
+ case nir_intrinsic_image_atomic_exchange:
+ case nir_intrinsic_image_atomic_comp_swap:
+ case nir_intrinsic_store_ssbo:
+ case nir_intrinsic_ssbo_atomic_add:
+ case nir_intrinsic_ssbo_atomic_imin:
+ case nir_intrinsic_ssbo_atomic_umin:
+ case nir_intrinsic_ssbo_atomic_imax:
+ case nir_intrinsic_ssbo_atomic_umax:
+ case nir_intrinsic_ssbo_atomic_and:
+ case nir_intrinsic_ssbo_atomic_or:
+ case nir_intrinsic_ssbo_atomic_xor:
+ case nir_intrinsic_ssbo_atomic_exchange:
+ case nir_intrinsic_ssbo_atomic_comp_swap:
+ info->writes_memory = true;
+ break;
+ default:
+ break;
+ }
+ }
+}
+
+void si_nir_scan_shader(const struct nir_shader *nir,
+ struct tgsi_shader_info *info)
+{
+ nir_function *func;
+ unsigned i;
+
+ assert(nir->stage == MESA_SHADER_VERTEX ||
+ nir->stage == MESA_SHADER_FRAGMENT);
+
+ info->processor = pipe_shader_type_from_mesa(nir->stage);
+ info->num_tokens = 2; /* indicate that the shader is non-empty */
+ info->num_instructions = 2;
+
+ info->num_inputs = nir->num_inputs;
+ info->num_outputs = nir->num_outputs;
+
+ i = 0;
+ nir_foreach_variable(variable, &nir->inputs) {
+ unsigned semantic_name, semantic_index;
+ unsigned attrib_count = glsl_count_attribute_slots(variable->type,
+ nir->stage == MESA_SHADER_VERTEX);
+
+ assert(attrib_count == 1 && "not implemented");
+
+ /* Vertex shader inputs don't have semantics. The state
+ * tracker has already mapped them to attributes via
+ * variable->data.driver_location.
+ */
+ if (nir->stage == MESA_SHADER_VERTEX)
+ continue;
+
+ /* Fragment shader position is a system value. */
+ if (nir->stage == MESA_SHADER_FRAGMENT &&
+ variable->data.location == VARYING_SLOT_POS) {
+ if (variable->data.pixel_center_integer)
+ info->properties[TGSI_PROPERTY_FS_COORD_PIXEL_CENTER] =
+ TGSI_FS_COORD_PIXEL_CENTER_INTEGER;
+ continue;
+ }
+
+ tgsi_get_gl_varying_semantic(variable->data.location, true,
+ &semantic_name, &semantic_index);
+
+ info->input_semantic_name[i] = semantic_name;
+ info->input_semantic_index[i] = semantic_index;
+
+ if (variable->data.sample)
+ info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_SAMPLE;
+ else if (variable->data.centroid)
+ info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_CENTROID;
+ else
+ info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_CENTER;
+
+ enum glsl_base_type base_type =
+ glsl_get_base_type(glsl_without_array(variable->type));
+
+ switch (variable->data.interpolation) {
+ case INTERP_MODE_NONE:
+ if (glsl_base_type_is_integer(base_type)) {
+ info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
+ break;
+ }
+
+ if (semantic_name == TGSI_SEMANTIC_COLOR) {
+ info->input_interpolate[i] = TGSI_INTERPOLATE_COLOR;
+ goto persp_locations;
+ }
+ /* fall-through */
+ case INTERP_MODE_SMOOTH:
+ assert(!glsl_base_type_is_integer(base_type));
+
+ info->input_interpolate[i] = TGSI_INTERPOLATE_PERSPECTIVE;
+
+ persp_locations:
+ if (variable->data.sample)
+ info->uses_persp_sample = true;
+ else if (variable->data.centroid)
+ info->uses_persp_centroid = true;
+ else
+ info->uses_persp_center = true;
+ break;
+
+ case INTERP_MODE_NOPERSPECTIVE:
+ assert(!glsl_base_type_is_integer(base_type));
+
+ info->input_interpolate[i] = TGSI_INTERPOLATE_LINEAR;
+
+ if (variable->data.sample)
+ info->uses_linear_sample = true;
+ else if (variable->data.centroid)
+ info->uses_linear_centroid = true;
+ else
+ info->uses_linear_center = true;
+ break;
+
+ case INTERP_MODE_FLAT:
+ info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
+ break;
+ }
+
+ /* TODO make this more precise */
+ if (variable->data.location == VARYING_SLOT_COL0)
+ info->colors_read |= 0x0f;
+ else if (variable->data.location == VARYING_SLOT_COL1)
+ info->colors_read |= 0xf0;
+
+ i++;
+ }
+
+ i = 0;
+ nir_foreach_variable(variable, &nir->outputs) {
+ unsigned semantic_name, semantic_index;
+
+ if (nir->stage == MESA_SHADER_FRAGMENT) {
+ tgsi_get_gl_frag_result_semantic(variable->data.location,
+ &semantic_name, &semantic_index);
+ } else {
+ tgsi_get_gl_varying_semantic(variable->data.location, true,
+ &semantic_name, &semantic_index);
+ }
+
+ info->output_semantic_name[i] = semantic_name;
+ info->output_semantic_index[i] = semantic_index;
+ info->output_usagemask[i] = TGSI_WRITEMASK_XYZW;
+
+ switch (semantic_name) {
+ case TGSI_SEMANTIC_PRIMID:
+ info->writes_primid = true;
+ break;
+ case TGSI_SEMANTIC_VIEWPORT_INDEX:
+ info->writes_viewport_index = true;
+ break;
+ case TGSI_SEMANTIC_LAYER:
+ info->writes_layer = true;
+ break;
+ case TGSI_SEMANTIC_PSIZE:
+ info->writes_psize = true;
+ break;
+ case TGSI_SEMANTIC_CLIPVERTEX:
+ info->writes_clipvertex = true;
+ break;
+ case TGSI_SEMANTIC_COLOR:
+ info->colors_written |= 1 << semantic_index;
+ break;
+ case TGSI_SEMANTIC_STENCIL:
+ info->writes_stencil = true;
+ break;
+ case TGSI_SEMANTIC_SAMPLEMASK:
+ info->writes_samplemask = true;
+ break;
+ case TGSI_SEMANTIC_EDGEFLAG:
+ info->writes_edgeflag = true;
+ break;
+ case TGSI_SEMANTIC_POSITION:
+ if (info->processor == PIPE_SHADER_FRAGMENT)
+ info->writes_z = true;
+ else
+ info->writes_position = true;
+ break;
+ }
+
+ i++;
+ }
+
+ nir_foreach_variable(variable, &nir->uniforms) {
+ const struct glsl_type *type = variable->type;
+ enum glsl_base_type base_type =
+ glsl_get_base_type(glsl_without_array(type));
+ unsigned aoa_size = MAX2(1, glsl_get_aoa_size(type));
+
+ /* We rely on the fact that nir_lower_samplers_as_deref has
+ * eliminated struct dereferences.
+ */
+ if (base_type == GLSL_TYPE_SAMPLER)
+ info->samplers_declared |=
+ u_bit_consecutive(variable->data.binding, aoa_size);
+ else if (base_type == GLSL_TYPE_IMAGE)
+ info->images_declared |=
+ u_bit_consecutive(variable->data.binding, aoa_size);
+ }
+
+ info->num_written_clipdistance = nir->info.clip_distance_array_size;
+ info->num_written_culldistance = nir->info.cull_distance_array_size;
+ info->clipdist_writemask = u_bit_consecutive(0, info->num_written_clipdistance);
+ info->culldist_writemask = u_bit_consecutive(info->num_written_clipdistance,
+ info->num_written_culldistance);
+
+ if (info->processor == PIPE_SHADER_FRAGMENT)
+ info->uses_kill = nir->info.fs.uses_discard;
+
+ /* TODO make this more accurate */
+ info->const_buffers_declared = u_bit_consecutive(0, SI_NUM_CONST_BUFFERS);
+ info->shader_buffers_declared = u_bit_consecutive(0, SI_NUM_SHADER_BUFFERS);
+
+ func = (struct nir_function *)exec_list_get_head_const(&nir->functions);
+ nir_foreach_block(block, func->impl) {
+ nir_foreach_instr(instr, block)
+ scan_instruction(info, instr);
+ }
+}
+
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 9bcf2e08163..07c6d43b759 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1971,14 +1971,25 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
sel->compiler_ctx_state.tm = sctx->tm;
sel->compiler_ctx_state.debug = sctx->b.debug;
sel->compiler_ctx_state.is_debug_context = sctx->is_debug;
- sel->tokens = tgsi_dup_tokens(state->tokens);
- if (!sel->tokens) {
- FREE(sel);
- return NULL;
- }
sel->so = state->stream_output;
- tgsi_scan_shader(state->tokens, &sel->info);
+
+ if (state->type == PIPE_SHADER_IR_TGSI) {
+ sel->tokens = tgsi_dup_tokens(state->tokens);
+ if (!sel->tokens) {
+ FREE(sel);
+ return NULL;
+ }
+
+ tgsi_scan_shader(state->tokens, &sel->info);
+ } else {
+ assert(state->type == PIPE_SHADER_IR_NIR);
+
+ sel->nir = state->ir.nir;
+
+ si_nir_scan_shader(sel->nir, &sel->info);
+ }
+
sel->type = sel->info.processor;
p_atomic_inc(&sscreen->b.num_shaders_created);
si_get_active_slot_masks(&sel->info,