diff options
| author | Marek Olšák <[email protected]> | 2016-10-27 23:48:44 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-03-30 14:44:33 +0200 |
| commit | 272b50a6f43adc6aa49da778119af9b219c170ae (patch) | |
| tree | c86618b3c1aa015f95ff378321d62e5bd2a2fae5 /src/gallium/drivers/radeonsi | |
| parent | aba8e0ea68c18804b448b0ba19b5d8e0f877205f (diff) | |
radeonsi/gfx9: do DCC clears on non-mipmapped textures only
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_blit.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c index da6c0cda2bb..24c73d0e8de 100644 --- a/src/gallium/drivers/radeonsi/si_blit.c +++ b/src/gallium/drivers/radeonsi/si_blit.c @@ -1035,6 +1035,11 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx, */ if (dst->dcc_offset && info->dst.level < dst->surface.num_dcc_levels) { + /* TODO: Implement per-level DCC clears for GFX9. */ + if (sctx->b.chip_class >= GFX9 && + info->dst.resource->last_level != 0) + goto resolve_to_temp; + vi_dcc_clear_level(&sctx->b, dst, info->dst.level, 0xFFFFFFFF); dst->dirty_level_mask &= ~(1 << info->dst.level); |