diff options
author | Marek Olšák <[email protected]> | 2018-04-01 15:37:11 -0400 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2018-04-05 15:34:58 -0400 |
commit | e5053060ebe1362b8aa6cdf60184a6fae49e025e (patch) | |
tree | 92b850ffaba9aaa051d3e6ebcf0dc8e26da239e1 /src/gallium/drivers/radeonsi | |
parent | 884fd97f6b83ac674f158e843941cbea3ca6582b (diff) |
radeonsi: use r600_common_context less pt5
Acked-by: Timothy Arceri <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_gfx_cs.c | 4 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_perfcounter.c | 25 |
2 files changed, 14 insertions, 15 deletions
diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c index dc52371e14f..3e907cab7a3 100644 --- a/src/gallium/drivers/radeonsi/si_gfx_cs.c +++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c @@ -94,7 +94,7 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags, ctx->gfx_flush_in_progress = true; if (!LIST_IS_EMPTY(&ctx->b.active_queries)) - si_suspend_queries(&ctx->b); + si_suspend_queries(ctx); ctx->streamout.suspended = false; if (ctx->streamout.begin_emitted) { @@ -272,7 +272,7 @@ void si_begin_new_gfx_cs(struct si_context *ctx) } if (!LIST_IS_EMPTY(&ctx->b.active_queries)) - si_resume_queries(&ctx->b); + si_resume_queries(ctx); assert(!ctx->b.gfx_cs->prev_dw); ctx->b.initial_gfx_cs_size = ctx->b.gfx_cs->current.cdw; diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c index 46e2c7454f0..86cf1f6f8da 100644 --- a/src/gallium/drivers/radeonsi/si_perfcounter.c +++ b/src/gallium/drivers/radeonsi/si_perfcounter.c @@ -423,10 +423,10 @@ static struct si_pc_block groups_gfx9[] = { { &cik_CPC, 35 }, }; -static void si_pc_emit_instance(struct r600_common_context *ctx, +static void si_pc_emit_instance(struct si_context *sctx, int se, int instance) { - struct radeon_winsys_cs *cs = ctx->gfx_cs; + struct radeon_winsys_cs *cs = sctx->b.gfx_cs; unsigned value = S_030800_SH_BROADCAST_WRITES(1); if (se >= 0) { @@ -444,23 +444,23 @@ static void si_pc_emit_instance(struct r600_common_context *ctx, radeon_set_uconfig_reg(cs, R_030800_GRBM_GFX_INDEX, value); } -static void si_pc_emit_shaders(struct r600_common_context *ctx, +static void si_pc_emit_shaders(struct si_context *sctx, unsigned shaders) { - struct radeon_winsys_cs *cs = ctx->gfx_cs; + struct radeon_winsys_cs *cs = sctx->b.gfx_cs; radeon_set_uconfig_reg_seq(cs, R_036780_SQ_PERFCOUNTER_CTRL, 2); radeon_emit(cs, shaders & 0x7f); radeon_emit(cs, 0xffffffff); } -static void si_pc_emit_select(struct r600_common_context *ctx, +static void si_pc_emit_select(struct si_context *sctx, struct r600_perfcounter_block *group, unsigned count, unsigned *selectors) { struct si_pc_block *sigroup = (struct si_pc_block *)group->data; struct si_pc_block_base *regs = sigroup->b; - struct radeon_winsys_cs *cs = ctx->gfx_cs; + struct radeon_winsys_cs *cs = sctx->b.gfx_cs; unsigned idx; unsigned layout_multi = regs->layout & SI_PC_MULTI_MASK; unsigned dw; @@ -550,12 +550,12 @@ static void si_pc_emit_select(struct r600_common_context *ctx, } } -static void si_pc_emit_start(struct r600_common_context *ctx, +static void si_pc_emit_start(struct si_context *sctx, struct r600_resource *buffer, uint64_t va) { - struct radeon_winsys_cs *cs = ctx->gfx_cs; + struct radeon_winsys_cs *cs = sctx->b.gfx_cs; - radeon_add_to_buffer_list(ctx, ctx->gfx_cs, buffer, + radeon_add_to_buffer_list(&sctx->b, sctx->b.gfx_cs, buffer, RADEON_USAGE_WRITE, RADEON_PRIO_QUERY); radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0)); @@ -576,10 +576,9 @@ static void si_pc_emit_start(struct r600_common_context *ctx, /* Note: The buffer was already added in si_pc_emit_start, so we don't have to * do it again in here. */ -static void si_pc_emit_stop(struct r600_common_context *ctx, +static void si_pc_emit_stop(struct si_context *sctx, struct r600_resource *buffer, uint64_t va) { - struct si_context *sctx = (struct si_context*)ctx; struct radeon_winsys_cs *cs = sctx->b.gfx_cs; si_gfx_write_event_eop(sctx, V_028A90_BOTTOM_OF_PIPE_TS, 0, @@ -596,14 +595,14 @@ static void si_pc_emit_stop(struct r600_common_context *ctx, S_036020_PERFMON_SAMPLE_ENABLE(1)); } -static void si_pc_emit_read(struct r600_common_context *ctx, +static void si_pc_emit_read(struct si_context *sctx, struct r600_perfcounter_block *group, unsigned count, unsigned *selectors, struct r600_resource *buffer, uint64_t va) { struct si_pc_block *sigroup = (struct si_pc_block *)group->data; struct si_pc_block_base *regs = sigroup->b; - struct radeon_winsys_cs *cs = ctx->gfx_cs; + struct radeon_winsys_cs *cs = sctx->b.gfx_cs; unsigned idx; unsigned reg = regs->counter0_lo; unsigned reg_delta = 8; |