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authorNicolai Hähnle <[email protected]>2017-05-03 11:34:33 +0200
committerNicolai Hähnle <[email protected]>2017-05-08 17:42:17 +0200
commit707df19451f38cc9f69c019ec08ea38b8222b4da (patch)
treec1b0e31624b3f48bb9e89adddbb3a1a557af22e3 /src/gallium/drivers/radeonsi
parentf16b7558632d1d2d355a8251e969b8fc41f9c1e8 (diff)
radeonsi: clarify documentation of existing SI workaround
Limiting LS-HS to a single wave is required on all SI chips due to an issue with a power management feature. Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index f0ed898cfb0..f7190055e3b 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -184,8 +184,10 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
*/
*num_patches = MIN2(*num_patches, 40);
- /* SI bug workaround - limit LS-HS threadgroups to only one wave. */
if (sctx->b.chip_class == SI) {
+ /* SI bug workaround, related to power management. Limit LS-HS
+ * threadgroups to only one wave.
+ */
unsigned one_wave = 64 / MAX2(num_tcs_input_cp, num_tcs_output_cp);
*num_patches = MIN2(*num_patches, one_wave);