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authorMarek Olšák <[email protected]>2017-06-20 18:25:05 +0200
committerMarek Olšák <[email protected]>2017-06-22 13:15:27 +0200
commit920f20f03936dd1f1ffe9445d2c167ed2cac94f4 (patch)
tree7e5bb4120f24530041addadc631cd8e04d8c557b /src/gallium/drivers/radeonsi
parentc1754b69dc0687306d2ec66468109ae032ccbaf9 (diff)
radeonsi/gfx9: use TC L2 for fast color clear with CP DMA
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_cp_dma.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 9505d622aef..e737519eefd 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -142,8 +142,11 @@ static unsigned get_flush_flags(struct si_context *sctx, enum r600_coherency coh
static unsigned get_tc_l2_flag(struct si_context *sctx, enum r600_coherency coher)
{
- return coher == R600_COHERENCY_SHADER &&
- sctx->b.chip_class >= CIK ? CP_DMA_USE_L2 : 0;
+ if ((sctx->b.chip_class >= GFX9 && coher == R600_COHERENCY_CB_META) ||
+ (sctx->b.chip_class >= CIK && coher == R600_COHERENCY_SHADER))
+ return CP_DMA_USE_L2;
+
+ return 0;
}
static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst,