diff options
| author | Marek Olšák <[email protected]> | 2019-07-03 22:27:12 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2019-07-09 17:24:16 -0400 |
| commit | 4e56a2aaa86891873866966f9c4bd016ce907f77 (patch) | |
| tree | 62aceb06e20a43b11ce45e1d3fa2c7cc9306850f /src/gallium/drivers/radeonsi | |
| parent | 3521297251c071a43c00c6e3ac92d27369072e05 (diff) | |
radeonsi: simplify primitive binning enablement
Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
Acked-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 07b483a7668..669013ec3fd 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -1127,11 +1127,11 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws, sscreen->info.chip_class >= GFX10; /* Only enable primitive binning on APUs by default. */ - sscreen->dpbb_allowed = sscreen->info.family == CHIP_RAVEN || - sscreen->info.family == CHIP_RAVEN2; + sscreen->dpbb_allowed = sscreen->info.chip_class >= GFX9 && + !sscreen->info.has_dedicated_vram; - sscreen->dfsm_allowed = sscreen->info.family == CHIP_RAVEN || - sscreen->info.family == CHIP_RAVEN2; + sscreen->dfsm_allowed = sscreen->info.chip_class >= GFX9 && + !sscreen->info.has_dedicated_vram; /* Process DPBB enable flags. */ if (sscreen->debug_flags & DBG(DPBB)) { |