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authorMarek Olšák <[email protected]>2018-06-18 16:03:39 -0400
committerMarek Olšák <[email protected]>2018-06-28 22:27:25 -0400
commit7bac3b589cd542f037ab225797090b9da116eced (patch)
tree1dabc1009632f3f73939af2f7df49af281a11e95 /src/gallium/drivers/radeonsi
parent0da94fa19c70621339a7f934bd21925da839b10a (diff)
radeonsi: disable DCC statistics gathering on everything but Stoney
I think we don't need it on other chips.
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_clear.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index 8a3398c70c0..23c9962408c 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -447,7 +447,7 @@ static void si_do_fast_color_clear(struct si_context *sctx,
/* Fast clear is the most appropriate place to enable DCC for
* displayable surfaces.
*/
- if (!too_small) {
+ if (sctx->family == CHIP_STONEY && !too_small) {
vi_separate_dcc_try_enable(sctx, tex);
/* RB+ isn't supported with a CMASK clear only on Stoney,
@@ -455,8 +455,7 @@ static void si_do_fast_color_clear(struct si_context *sctx,
* clears, which is weighed when determining whether to
* enable separate DCC.
*/
- if (tex->dcc_gather_statistics &&
- sctx->family == CHIP_STONEY)
+ if (tex->dcc_gather_statistics) /* only for Stoney */
tex->num_slow_clears++;
}