radeonsi: use a clever alignment for constant buffer uploads

This results in a very tiny decrease in lgkm wait cycles.

Reviewed-by: Nicolai Hähnle <[email protected]>

2 files changed, 18 insertions, 1 deletions

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 8f636af96aa..72b33f3e8e0 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -1047,7 +1047,9 @@ void si_upload_const_buffer(struct si_context *sctx, struct r600_resource **rbuf
 {
 	void *tmp;
 
-	u_upload_alloc(sctx->b.b.stream_uploader, 0, size, 256, const_offset,
+	u_upload_alloc(sctx->b.b.stream_uploader, 0, size,
+		       si_optimal_tcc_alignment(sctx, size),
+		       const_offset,
 		       (struct pipe_resource**)rbuffer, &tmp);
 	if (*rbuffer)
 		util_memcpy_cpu_to_le32(tmp, ptr, size);
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index fb24babe61f..bee6881d096 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -512,4 +512,19 @@ static inline bool si_vs_exports_prim_id(struct si_shader *shader)
 		return false;
 }
 
+static inline unsigned
+si_optimal_tcc_alignment(struct si_context *sctx, unsigned upload_size)
+{
+	unsigned alignment, tcc_cache_line_size;
+
+	/* If the upload size is less than the cache line size (e.g. 16, 32),
+	 * the whole thing will fit into a cache line if we align it to its size.
+	 * The idea is that multiple small uploads can share a cache line.
+	 * If the upload size is greater, align it to the cache line size.
+	 */
+	alignment = util_next_power_of_two(upload_size);
+	tcc_cache_line_size = sctx->screen->b.info.tcc_cache_line_size;
+	return MIN2(alignment, tcc_cache_line_size);
+}
+
 #endif