diff options
| author | Marek Olšák <[email protected]> | 2017-08-18 21:14:01 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-08-22 13:29:47 +0200 |
| commit | 776fcccabf643d2128e6d63c435daf5f051985b1 (patch) | |
| tree | 8f72e720fd6ad1fd6b50e23f6265618d2013a939 /src/gallium/drivers/radeonsi | |
| parent | a57f588fa9a376ee7421a612b86c9825a220775f (diff) | |
gallium/radeon: clean up EOP_DATA_SEL magic numbers
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_perfcounter.c | 3 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 6 |
2 files changed, 6 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c index aa09e0ef6a3..4a543ea2449 100644 --- a/src/gallium/drivers/radeonsi/si_perfcounter.c +++ b/src/gallium/drivers/radeonsi/si_perfcounter.c @@ -614,7 +614,8 @@ static void si_pc_emit_stop(struct r600_common_context *ctx, { struct radeon_winsys_cs *cs = ctx->gfx.cs; - r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0, 1, + r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0, + EOP_DATA_SEL_VALUE_32BIT, buffer, va, 0, R600_NOT_QUERY); r600_gfx_wait_fence(ctx, va, 0, 0xffffffff); diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 3bec6396875..ebc362ed03e 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -899,7 +899,8 @@ void si_emit_cache_flush(struct si_context *sctx) /* Necessary for DCC */ if (rctx->chip_class == VI) r600_gfx_write_event_eop(rctx, V_028A90_FLUSH_AND_INV_CB_DATA_TS, - 0, 0, NULL, 0, 0, R600_NOT_QUERY); + 0, EOP_DATA_SEL_DISCARD, NULL, + 0, 0, R600_NOT_QUERY); } if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB) cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) | @@ -998,7 +999,8 @@ void si_emit_cache_flush(struct si_context *sctx) va = sctx->wait_mem_scratch->gpu_address; sctx->wait_mem_number++; - r600_gfx_write_event_eop(rctx, cb_db_event, tc_flags, 1, + r600_gfx_write_event_eop(rctx, cb_db_event, tc_flags, + EOP_DATA_SEL_VALUE_32BIT, sctx->wait_mem_scratch, va, sctx->wait_mem_number, R600_NOT_QUERY); r600_gfx_wait_fence(rctx, va, sctx->wait_mem_number, 0xffffffff); |