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authorTom Stellard <[email protected]>2014-08-07 15:31:17 -0400
committerTom Stellard <[email protected]>2014-08-13 14:11:44 -0400
commit72969e0efb7a5a011629c1001e81aa2329ede6b1 (patch)
treec4bcfab1f54a81ea0a6e7ce2e91c9793d6e502e5 /src/gallium/drivers/radeonsi
parent77ea58ca81eb3f5521d67c4459d3469df6d5ffd8 (diff)
radeon/compute: Report a value for PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
CC: "10.2" <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 592069746d9..879387f0fba 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -328,6 +328,13 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
case PIPE_SHADER_CAP_DOUBLES:
return 0; /* XXX: Enable doubles once the compiler can
handle them. */
+ case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: {
+ uint64_t max_const_buffer_size;
+ pscreen->get_compute_param(pscreen,
+ PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
+ &max_const_buffer_size);
+ return max_const_buffer_size;
+ }
default:
return 0;
}