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authorMarek Olšák <[email protected]>2017-06-15 00:29:41 +0200
committerMarek Olšák <[email protected]>2017-06-22 01:51:02 +0200
commitfdca690e91f932b494611a9e8808778405138808 (patch)
tree33bd50e06e8442459f977752ebfa9fecbf9ce5c6 /src/gallium/drivers/radeonsi
parentb007744051b5f49a7ac69bebf57836a201e8dcbf (diff)
radeonsi: add separate HUD counters for CB and DB cache flushes
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index ec564c1a057..d039e015cc6 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -861,9 +861,10 @@ void si_emit_cache_flush(struct si_context *sctx)
uint32_t flush_cb_db = rctx->flags & (SI_CONTEXT_FLUSH_AND_INV_CB |
SI_CONTEXT_FLUSH_AND_INV_DB);
- if (rctx->flags & (SI_CONTEXT_FLUSH_AND_INV_CB |
- SI_CONTEXT_FLUSH_AND_INV_DB))
- sctx->b.num_fb_cache_flushes++;
+ if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_CB)
+ sctx->b.num_cb_cache_flushes++;
+ if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB)
+ sctx->b.num_db_cache_flushes++;
/* SI has a bug that it always flushes ICACHE and KCACHE if either
* bit is set. An alternative way is to write SQC_CACHES, but that