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authorAlex Deucher <[email protected]>2012-09-28 17:35:26 -0400
committerAlex Deucher <[email protected]>2013-06-28 15:15:54 -0400
commitb363a45c545e161e986bd438b6be2bdabe56d446 (patch)
tree7193488fdbf5f57f919e12589b955bc6da16064c /src/gallium/drivers/radeonsi
parentecb679a8d305e2973bff386331f192ceae33cf67 (diff)
radeonsi: fix VGT_PRIMITIVE_TYPE emit for CIK
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 09c741fa3f1..234f66155fb 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -285,7 +285,10 @@ static bool si_update_draw_info_state(struct r600_context *rctx,
return false;
}
- si_pm4_set_reg(pm4, R_008958_VGT_PRIMITIVE_TYPE, prim);
+ if (rctx->chip_class >= CIK)
+ si_pm4_set_reg(pm4, R_030908_VGT_PRIMITIVE_TYPE, prim);
+ else
+ si_pm4_set_reg(pm4, R_008958_VGT_PRIMITIVE_TYPE, prim);
si_pm4_set_reg(pm4, R_028400_VGT_MAX_VTX_INDX, ~0);
si_pm4_set_reg(pm4, R_028404_VGT_MIN_VTX_INDX, 0);
si_pm4_set_reg(pm4, R_028408_VGT_INDX_OFFSET,