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authorChristian König <[email protected]>2013-04-03 10:18:35 +0200
committerChristian König <[email protected]>2013-04-11 17:10:28 +0200
commit5b2855bfe79bfc3995969f2bf775d89b1bc1808a (patch)
tree5da3383f7c400cc037b6dbaa1695bbdf24b09563 /src/gallium/drivers/radeonsi
parentf91e4d2c9d714bb7d667956cd93f216c18a434f4 (diff)
radeon/uvd: add UVD implementation v5
Just everything you need for UVD with r600g and radeonsi. v2: move UVD code to radeon subdir, clean up build system additions, remove an unused SI function, disable tiling on SI for now. v3: some minor indentation fix and rebased v4: dpb size calculation fixed v5: implement proper fall-back in case the kernel doesn't support UVD, based on patches from Andreas Boll but cleaned up a bit more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/Makefile.am4
-rw-r--r--src/gallium/drivers/radeonsi/Makefile.sources3
-rw-r--r--src/gallium/drivers/radeonsi/radeonsi_pipe.c21
-rw-r--r--src/gallium/drivers/radeonsi/radeonsi_pipe.h11
-rw-r--r--src/gallium/drivers/radeonsi/radeonsi_uvd.c160
5 files changed, 193 insertions, 6 deletions
diff --git a/src/gallium/drivers/radeonsi/Makefile.am b/src/gallium/drivers/radeonsi/Makefile.am
index e771d318525..df2870ee59d 100644
--- a/src/gallium/drivers/radeonsi/Makefile.am
+++ b/src/gallium/drivers/radeonsi/Makefile.am
@@ -33,4 +33,6 @@ AM_CPPFLAGS = \
AM_CFLAGS = $(LLVM_CFLAGS)
libradeonsi_la_SOURCES = $(C_SOURCES)
-libradeonsi_la_LIBADD = ../radeon/libllvmradeon@[email protected]
+libradeonsi_la_LIBADD = \
+ ../radeon/libradeon.la \
+ ../radeon/libllvmradeon@[email protected]
diff --git a/src/gallium/drivers/radeonsi/Makefile.sources b/src/gallium/drivers/radeonsi/Makefile.sources
index 5e1cc4f6aa6..b3ffa727eb5 100644
--- a/src/gallium/drivers/radeonsi/Makefile.sources
+++ b/src/gallium/drivers/radeonsi/Makefile.sources
@@ -13,4 +13,5 @@ C_SOURCES := \
si_state.c \
si_state_streamout.c \
si_state_draw.c \
- si_commands.c
+ si_commands.c \
+ radeonsi_uvd.c
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
index f668d8b9d6e..5c25b2f98b3 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pipe.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
@@ -43,6 +43,8 @@
#include "vl/vl_video_buffer.h"
#include "os/os_time.h"
#include "pipebuffer/pb_buffer.h"
+#include "radeonsi_pipe.h"
+#include "radeon/radeon_uvd.h"
#include "r600.h"
#include "sid.h"
#include "r600_resource.h"
@@ -219,8 +221,13 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
si_init_surface_functions(rctx);
si_init_compute_functions(rctx);
- rctx->context.create_video_decoder = vl_create_decoder;
- rctx->context.create_video_buffer = vl_video_buffer_create;
+ if (rscreen->info.has_uvd) {
+ rctx->context.create_video_decoder = radeonsi_uvd_create_decoder;
+ rctx->context.create_video_buffer = radeonsi_video_buffer_create;
+ } else {
+ rctx->context.create_video_decoder = vl_create_decoder;
+ rctx->context.create_video_buffer = vl_video_buffer_create;
+ }
switch (rctx->chip_class) {
case TAHITI:
@@ -784,16 +791,22 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
rscreen->screen.get_param = r600_get_param;
rscreen->screen.get_shader_param = r600_get_shader_param;
rscreen->screen.get_paramf = r600_get_paramf;
- rscreen->screen.get_video_param = r600_get_video_param;
rscreen->screen.get_compute_param = r600_get_compute_param;
rscreen->screen.is_format_supported = si_is_format_supported;
- rscreen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
rscreen->screen.context_create = r600_create_context;
rscreen->screen.fence_reference = r600_fence_reference;
rscreen->screen.fence_signalled = r600_fence_signalled;
rscreen->screen.fence_finish = r600_fence_finish;
r600_init_screen_resource_functions(&rscreen->screen);
+ if (rscreen->info.has_uvd) {
+ rscreen->screen.get_video_param = ruvd_get_video_param;
+ rscreen->screen.is_video_format_supported = ruvd_is_format_supported;
+ } else {
+ rscreen->screen.get_video_param = r600_get_video_param;
+ rscreen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
+ }
+
util_format_s3tc_init();
rscreen->fences.bo = NULL;
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.h b/src/gallium/drivers/radeonsi/radeonsi_pipe.h
index 0dff6979a2e..388f6df0518 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pipe.h
+++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.h
@@ -249,6 +249,17 @@ void r600_trace_emit(struct r600_context *rctx);
/* radeonsi_compute.c */
void si_init_compute_functions(struct r600_context *rctx);
+/* radeonsi_uvd.c */
+struct pipe_video_decoder *radeonsi_uvd_create_decoder(struct pipe_context *context,
+ enum pipe_video_profile profile,
+ enum pipe_video_entrypoint entrypoint,
+ enum pipe_video_chroma_format chroma_format,
+ unsigned width, unsigned height,
+ unsigned max_references, bool expect_chunked_decode);
+
+struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe,
+ const struct pipe_video_buffer *tmpl);
+
/*
* common helpers
*/
diff --git a/src/gallium/drivers/radeonsi/radeonsi_uvd.c b/src/gallium/drivers/radeonsi/radeonsi_uvd.c
new file mode 100644
index 00000000000..d49c0884dc0
--- /dev/null
+++ b/src/gallium/drivers/radeonsi/radeonsi_uvd.c
@@ -0,0 +1,160 @@
+/**************************************************************************
+ *
+ * Copyright 2011 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+/*
+ * Authors:
+ * Christian König <[email protected]>
+ *
+ */
+
+#include <sys/types.h>
+#include <assert.h>
+#include <errno.h>
+#include <unistd.h>
+
+#include "pipe/p_video_decoder.h"
+
+#include "util/u_memory.h"
+#include "util/u_video.h"
+
+#include "vl/vl_defines.h"
+#include "vl/vl_mpeg12_decoder.h"
+
+#include "radeonsi_pipe.h"
+#include "radeon/radeon_uvd.h"
+#include "sid.h"
+
+/**
+ * creates an video buffer with an UVD compatible memory layout
+ */
+struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe,
+ const struct pipe_video_buffer *tmpl)
+{
+ struct r600_context *ctx = (struct r600_context *)pipe;
+ struct r600_resource_texture *resources[VL_NUM_COMPONENTS] = {};
+ struct radeon_surface *surfaces[VL_NUM_COMPONENTS] = {};
+ struct pb_buffer **pbs[VL_NUM_COMPONENTS] = {};
+ const enum pipe_format *resource_formats;
+ struct pipe_video_buffer template;
+ struct pipe_resource templ;
+ unsigned i, depth;
+
+ assert(pipe);
+
+ /* first create the needed resources as "normal" textures */
+ resource_formats = vl_video_buffer_formats(pipe->screen, tmpl->buffer_format);
+ if (!resource_formats)
+ return NULL;
+
+ depth = tmpl->interlaced ? 2 : 1;
+ template = *tmpl;
+ template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
+ template.height = align(tmpl->height / depth, VL_MACROBLOCK_HEIGHT);
+
+ vl_vide_buffer_template(&templ, &template, resource_formats[0], depth, PIPE_USAGE_STATIC, 0);
+ resources[0] = (struct r600_resource_texture *)
+ pipe->screen->resource_create(pipe->screen, &templ);
+ if (!resources[0])
+ goto error;
+
+ if (resource_formats[1] != PIPE_FORMAT_NONE) {
+ vl_vide_buffer_template(&templ, &template, resource_formats[1], depth, PIPE_USAGE_STATIC, 1);
+ resources[1] = (struct r600_resource_texture *)
+ pipe->screen->resource_create(pipe->screen, &templ);
+ if (!resources[1])
+ goto error;
+ }
+
+ if (resource_formats[2] != PIPE_FORMAT_NONE) {
+ vl_vide_buffer_template(&templ, &template, resource_formats[2], depth, PIPE_USAGE_STATIC, 2);
+ resources[2] = (struct r600_resource_texture *)
+ pipe->screen->resource_create(pipe->screen, &templ);
+ if (!resources[2])
+ goto error;
+ }
+
+ for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
+ if (!resources[i])
+ continue;
+
+ surfaces[i] = & resources[i]->surface;
+ pbs[i] = &resources[i]->resource.buf;
+ }
+
+ ruvd_join_surfaces(ctx->ws, templ.bind, pbs, surfaces);
+
+ for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
+ if (!resources[i])
+ continue;
+
+ /* recreate the CS handle */
+ resources[i]->resource.cs_buf = ctx->ws->buffer_get_cs_handle(
+ resources[i]->resource.buf);
+
+ /* TODO: tiling used to work with UVD on SI */
+ resources[i]->surface.level[0].mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
+ }
+
+ template.height *= depth;
+ return vl_video_buffer_create_ex2(pipe, &template, (struct pipe_resource **)resources);
+
+error:
+ for (i = 0; i < VL_NUM_COMPONENTS; ++i)
+ pipe_resource_reference((struct pipe_resource **)&resources[i], NULL);
+
+ return NULL;
+}
+
+/* set the decoding target buffer offsets */
+static struct radeon_winsys_cs_handle* radeonsi_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
+{
+ struct r600_resource_texture *luma = (struct r600_resource_texture *)buf->resources[0];
+ struct r600_resource_texture *chroma = (struct r600_resource_texture *)buf->resources[1];
+
+ msg->decode.dt_field_mode = buf->base.interlaced;
+
+ ruvd_set_dt_surfaces(msg, &luma->surface, &chroma->surface);
+
+ return luma->resource.cs_buf;
+}
+
+/**
+ * creates an UVD compatible decoder
+ */
+struct pipe_video_decoder *radeonsi_uvd_create_decoder(struct pipe_context *context,
+ enum pipe_video_profile profile,
+ enum pipe_video_entrypoint entrypoint,
+ enum pipe_video_chroma_format chroma_format,
+ unsigned width, unsigned height,
+ unsigned max_references, bool expect_chunked_decode)
+{
+ struct r600_context *ctx = (struct r600_context *)context;
+
+ return ruvd_create_decoder(context, profile, entrypoint, chroma_format,
+ width, height, max_references, expect_chunked_decode,
+ ctx->ws, radeonsi_uvd_set_dtb);
+}