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authorMarek Olšák <[email protected]>2015-04-16 20:35:27 +0200
committerMarek Olšák <[email protected]>2015-08-14 15:02:29 +0200
commit8ba70e0a7405005c079eb72f94999245c992aa91 (patch)
tree6d8d02a418f7c3b2229e97eb1503c82b4be04f12 /src/gallium/drivers/radeonsi
parente7fc664b91a5d886c2709d05a498f6a1dfbaf136 (diff)
radeonsi: fix DRM version checks for amdgpu DRM 3.0.0
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c4
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c8
2 files changed, 7 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 22efc6837eb..9b5cdd8dc12 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -271,7 +271,9 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_TEXTURE_MULTISAMPLE:
/* 2D tiling on CIK is supported since DRM 2.35.0 */
return sscreen->b.chip_class < CIK ||
- sscreen->b.info.drm_minor >= 35;
+ (sscreen->b.info.drm_major == 2 &&
+ sscreen->b.info.drm_minor >= 35) ||
+ sscreen->b.info.drm_major == 3;
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
return R600_MAP_BUFFER_ALIGNMENT;
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index b9f512d17b6..227d975e380 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1178,7 +1178,9 @@ static uint32_t si_translate_texformat(struct pipe_screen *screen,
int first_non_void)
{
struct si_screen *sscreen = (struct si_screen*)screen;
- bool enable_compressed_formats = sscreen->b.info.drm_minor >= 31;
+ bool enable_compressed_formats = (sscreen->b.info.drm_major == 2 &&
+ sscreen->b.info.drm_minor >= 31) ||
+ sscreen->b.info.drm_major == 3;
boolean uniform = TRUE;
int i;
@@ -1626,7 +1628,6 @@ boolean si_is_format_supported(struct pipe_screen *screen,
unsigned sample_count,
unsigned usage)
{
- struct si_screen *sscreen = (struct si_screen *)screen;
unsigned retval = 0;
if (target >= PIPE_MAX_TEXTURE_TYPES) {
@@ -1638,8 +1639,7 @@ boolean si_is_format_supported(struct pipe_screen *screen,
return FALSE;
if (sample_count > 1) {
- /* 2D tiling on CIK is supported since DRM 2.35.0 */
- if (sscreen->b.chip_class >= CIK && sscreen->b.info.drm_minor < 35)
+ if (!screen->get_param(screen, PIPE_CAP_TEXTURE_MULTISAMPLE))
return FALSE;
switch (sample_count) {