diff options
| author | Tom Stellard <[email protected]> | 2014-09-09 15:18:57 -0400 |
|---|---|---|
| committer | Tom Stellard <[email protected]> | 2014-12-08 17:20:50 -0500 |
| commit | 67dcbcd92cb9877a04747d6cf7fef14c2b8af8b3 (patch) | |
| tree | f618675c6b1ca1056183f65f24d20aa70b68e53c /src/gallium/drivers/radeonsi/sid.h | |
| parent | fea5c2640b564daf47608215b2156e5b18f7d262 (diff) | |
radeonsi: Program RASTER_CONFIG for harvested GPUs v5
Harvested GPUs have some of their render backends disabled, so
in order to prevent the hardware from trying to render things
with these disabled backends we need to correctly program
the PA_SC_RASTER_CONFIG register.
v2:
- Write RASTER_CONFIG for all SEs.
v3:
- Set GRBM_GFX_INDEX.INSTANCE_BROADCAST_WRITES bit.
- Set GRBM_GFX_INFEX.SH_BROADCAST_WRITES bit when done setting
PA_SC_RASTER_CONFIG.
- Get num_se and num_sh_per_se from kernel.
v4:
- Get correct value for num_se
- Remove loop for setting PA_SC_RASTER_CONFIG
- Only compute raster config when a backend has been disabled.
v5: Michel Dänzer
- Fix computation for chips with multiple SEs
https://bugs.freedesktop.org/show_bug.cgi?id=60879
CC: "10.4 10.3" <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/sid.h')
| -rw-r--r-- | src/gallium/drivers/radeonsi/sid.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/sid.h b/src/gallium/drivers/radeonsi/sid.h index c4d4afd6f02..c78ba7c2991 100644 --- a/src/gallium/drivers/radeonsi/sid.h +++ b/src/gallium/drivers/radeonsi/sid.h @@ -204,7 +204,13 @@ * 6. COMMAND [29:22] | BYTE_COUNT [20:0] */ - +#define GRBM_GFX_INDEX 0x802C +#define INSTANCE_INDEX(x) ((x) << 0) +#define SH_INDEX(x) ((x) << 8) +#define SE_INDEX(x) ((x) << 16) +#define SH_BROADCAST_WRITES (1 << 29) +#define INSTANCE_BROADCAST_WRITES (1 << 30) +#define SE_BROADCAST_WRITES (1 << 31) #define R_0084FC_CP_STRMOUT_CNTL 0x0084FC #define S_0084FC_OFFSET_UPDATE_DONE(x) (((x) & 0x1) << 0) #define R_0085F0_CP_COHER_CNTL 0x0085F0 |