summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi/si_state_draw.c
diff options
context:
space:
mode:
authorNicolai Hähnle <[email protected]>2016-08-08 17:06:22 +0200
committerNicolai Hähnle <[email protected]>2016-08-09 15:56:03 +0200
commit2852dedaa0c45e426a53ba0042ecdb0f1b87950f (patch)
treecbb83e361477770537dd0c76aee69f4ec6b41016 /src/gallium/drivers/radeonsi/si_state_draw.c
parent76c4a3b567606d635c42809570a18089b4a41f9c (diff)
radeonsi: flush TC L2 cache for indirect draw data
This fixes a bug when indirect draw data is generated by transform feedback. Cc: [email protected] Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state_draw.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index a60723d225d..b5593064131 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -967,6 +967,11 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
r600_resource(ib.buffer)->TC_L2_dirty = false;
}
+ if (info->indirect && r600_resource(info->indirect)->TC_L2_dirty) {
+ sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2;
+ r600_resource(info->indirect)->TC_L2_dirty = false;
+ }
+
/* Check flush flags. */
if (sctx->b.flags)
si_mark_atom_dirty(sctx, sctx->atoms.s.cache_flush);