diff options
| author | Marek Olšák <[email protected]> | 2018-06-01 00:21:49 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-06-13 22:00:42 -0400 |
| commit | 47b780be21d917eaa6a6a6c9e30ba9fba52d9acd (patch) | |
| tree | db9d800b5b4cf66f4dc66bfcbc2c8cf2dfdfef58 /src/gallium/drivers/radeonsi/si_state_binning.c | |
| parent | a152ca70f224648c59ace6b77441f08409f04abf (diff) | |
radeonsi/gfx9: set POPS_DRAIN_PS_ON_OVERLAP due to a hw bug
This may not be needed yet, but let's set it now.
Tested-by: Dieter Nützel <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state_binning.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_binning.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c index 91e616907ea..6877cc0a62d 100644 --- a/src/gallium/drivers/radeonsi/si_state_binning.c +++ b/src/gallium/drivers/radeonsi/si_state_binning.c @@ -316,7 +316,8 @@ static void si_emit_dpbb_disable(struct si_context *sctx) S_028C44_DISABLE_START_OF_PRIM(1)); radeon_opt_set_context_reg(sctx, R_028060_DB_DFSM_CONTROL, SI_TRACKED_DB_DFSM_CONTROL, - S_028060_PUNCHOUT_MODE(V_028060_FORCE_OFF)); + S_028060_PUNCHOUT_MODE(V_028060_FORCE_OFF) | + S_028060_POPS_DRAIN_PS_ON_OVERLAP(1)); } void si_emit_dpbb_state(struct si_context *sctx) @@ -436,5 +437,6 @@ void si_emit_dpbb_state(struct si_context *sctx) S_028C44_OPTIMAL_BIN_SELECTION(1)); radeon_opt_set_context_reg(sctx, R_028060_DB_DFSM_CONTROL, SI_TRACKED_DB_DFSM_CONTROL, - S_028060_PUNCHOUT_MODE(punchout_mode)); + S_028060_PUNCHOUT_MODE(punchout_mode) | + S_028060_POPS_DRAIN_PS_ON_OVERLAP(1)); } |