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authorNicolai Hähnle <[email protected]>2018-09-19 14:53:35 +0200
committerMarek Olšák <[email protected]>2019-07-03 15:51:13 -0400
commit792a638b032d16fbe6404f9d90c34b3e0f1fb0b5 (patch)
tree2fc020d12cded02beb595e8e979a347bd537b96f /src/gallium/drivers/radeonsi/si_state.h
parentbcd2d2e1942ab7158dd46a5223130498cb0a8f44 (diff)
radeonsi/gfx10: implement streamout-related queries
The NGG hardware pipeline doesn't track these statistics automatically, and in fact *cannot* track them automatically when API geometry shaders are involved, so we accumulate statistics in the shader using atomic adds. This implementation accumulates statistics via the memory system and the RW buffer descriptor setup. We could use GDS, but since these atomics aren't latency-sensitive, that basically just trades off L2$ bandwidth vs. export bus bandwidth. One single memory transaction per shader workgroup doesn't seem too bad. The result ring buffer in memory is needed either way to avoid pipeline stalls. The shader code contains the atomic unconditionally, though the GFX10_GS_QUERY_BUF is a null buffer when no queries are active. The atomic is simply discarded by the shader hardware in that case. Acked-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.h')
-rw-r--r--src/gallium/drivers/radeonsi/si_state.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index 678f87cd73d..757dd1bf5cd 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -228,6 +228,7 @@ union si_state_atoms {
struct si_atom spi_map;
struct si_atom scratch_state;
struct si_atom window_rectangles;
+ struct si_atom shader_query;
} s;
struct si_atom array[0];
};
@@ -370,6 +371,8 @@ enum {
SI_PS_IMAGE_COLORBUF0_FMASK,
SI_PS_IMAGE_COLORBUF0_FMASK_HI,
+ GFX10_GS_QUERY_BUF,
+
SI_NUM_RW_BUFFERS,
};