diff options
| author | Marek Olšák <[email protected]> | 2017-05-13 14:01:27 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-05-18 22:15:02 +0200 |
| commit | 5df24c3fa627243c259f5266359098463e41d172 (patch) | |
| tree | fd74daeabf2c0e8cf83b3c4460a62860389d5bb5 /src/gallium/drivers/radeonsi/si_state.h | |
| parent | d88ca123508ae960c47c5ba1e4ce6e2d19d6a540 (diff) | |
radeonsi: merge constant and shader buffers descriptor lists into one
Constant buffers: slot[16], .. slot[31] (ascending)
Shader buffers: slot[15], .. slot[0] (descending)
The idea is that if we have 4 constant buffers and 2 shader buffers, we only
have to upload 6 slots. That optimization is left for a later commit.
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.h')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.h | 25 |
1 files changed, 20 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index 629d614f7fc..90d09720968 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -194,11 +194,12 @@ enum { * 21 - compute const buffers * ... */ -#define SI_SHADER_DESCS_CONST_BUFFERS 0 -#define SI_SHADER_DESCS_SHADER_BUFFERS 1 -#define SI_SHADER_DESCS_SAMPLERS 2 -#define SI_SHADER_DESCS_IMAGES 3 -#define SI_NUM_SHADER_DESCS 4 +enum { + SI_SHADER_DESCS_CONST_AND_SHADER_BUFFERS, + SI_SHADER_DESCS_SAMPLERS, + SI_SHADER_DESCS_IMAGES, + SI_NUM_SHADER_DESCS, +}; #define SI_DESCS_RW_BUFFERS 0 #define SI_DESCS_FIRST_SHADER 1 @@ -251,7 +252,9 @@ struct si_sampler_views { struct si_buffer_resources { enum radeon_bo_usage shader_usage; /* READ, WRITE, or READWRITE */ + enum radeon_bo_usage shader_usage_constbuf; enum radeon_bo_priority priority; + enum radeon_bo_priority priority_constbuf; struct pipe_resource **buffers; /* this has num_buffers elements */ /* The i-th bit is set if that element is enabled (non-NULL resource). */ @@ -372,4 +375,16 @@ si_tile_mode_index(struct r600_texture *rtex, unsigned level, bool stencil) return rtex->surface.u.legacy.tiling_index[level]; } +static inline unsigned si_get_constbuf_slot(unsigned slot) +{ + /* Constant buffers are in slots [16..31], ascending */ + return SI_NUM_SHADER_BUFFERS + slot; +} + +static inline unsigned si_get_shaderbuf_slot(unsigned slot) +{ + /* shader buffers are in slots [15..0], descending */ + return SI_NUM_SHADER_BUFFERS - 1 - slot; +} + #endif |