diff options
| author | Nicolai Hähnle <[email protected]> | 2019-05-07 23:50:01 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2019-07-03 15:51:12 -0400 |
| commit | 016a465d7d4e2ab7a924334d40fd60fbdf0b3276 (patch) | |
| tree | 405a94c7d8bd8629d382fc3af65bc66a9f431463 /src/gallium/drivers/radeonsi/si_state.h | |
| parent | d0c204a1e078a803e54fd53124984bf84391d4b6 (diff) | |
radeonsi/gfx10: implement gfx10_shader_ngg
For pipelines without API GS. We will later expand this to cover NGG
geometry shaders as well.
Note that the vtx offset passed into the GS part is just the
vertex index multiplied by VGT_ESGS_RING_ITEMSIZE.
Acked-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.h')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index c271effe053..23c7b3245f5 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -318,8 +318,12 @@ enum si_tracked_reg { SI_TRACKED_VGT_PRIMITIVEID_EN, SI_TRACKED_VGT_REUSE_OFF, SI_TRACKED_SPI_VS_OUT_CONFIG, - SI_TRACKED_SPI_SHADER_POS_FORMAT, SI_TRACKED_PA_CL_VTE_CNTL, + SI_TRACKED_GE_MAX_OUTPUT_PER_SUBGROUP, + SI_TRACKED_GE_NGG_SUBGRP_CNTL, + + SI_TRACKED_SPI_SHADER_IDX_FORMAT, /* 2 consecutive registers */ + SI_TRACKED_SPI_SHADER_POS_FORMAT, SI_TRACKED_SPI_PS_INPUT_ENA, /* 2 consecutive registers */ SI_TRACKED_SPI_PS_INPUT_ADDR, |