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author | Marek Olšák <[email protected]> | 2018-02-07 01:31:33 +0100 |
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committer | Marek Olšák <[email protected]> | 2018-02-24 23:08:28 +0100 |
commit | 1d1df76d2b3b65f18002cec1957c6115b5bd12a5 (patch) | |
tree | de4bcd8359e28e81b631010587e4300b6a1a5d95 /src/gallium/drivers/radeonsi/si_state.h | |
parent | fca7dee9c6aa669764d8179e3064ea28b17d2835 (diff) |
radeonsi: change si_descriptors::shader_userdata_offset type to short
We will want to use SH registers outside of user data SGPRs, like the GFX9
special SGPRs.
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.h')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index 5233be72462..02659a7a4f3 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -271,9 +271,9 @@ struct si_descriptors { uint32_t first_active_slot; uint32_t num_active_slots; - /* The SGPR index where the 64-bit pointer to the descriptor array will - * be stored. */ - ubyte shader_userdata_offset; + /* The SH register offset relative to USER_DATA*_0 where the pointer + * to the descriptor array will be stored. */ + short shader_userdata_offset; /* The size of one descriptor. */ ubyte element_dw_size; /* If there is only one slot enabled, bind it directly instead of |