diff options
author | Christian König <[email protected]> | 2012-07-18 14:36:10 +0200 |
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committer | Christian König <[email protected]> | 2012-07-24 12:29:30 +0200 |
commit | bd2a5cf328c21f2d5b243442ee2eac73a996b15c (patch) | |
tree | 64e48ffc360f396f4ad29fea4bb76d000fb8ac31 /src/gallium/drivers/radeonsi/si_state.c | |
parent | 840f05da6b92ba5266385836533842b9a9fc5da9 (diff) |
radeonsi: move spi into new handling
Signed-off-by: Christian König <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 0c56b90c289..d2b17e0dea2 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -1431,3 +1431,47 @@ bool si_update_draw_info_state(struct r600_context *rctx, si_pm4_set_state(rctx, draw_info, pm4); return true; } + +void si_update_spi_map(struct r600_context *rctx) +{ + struct r600_shader *ps = &rctx->ps_shader->shader; + struct r600_shader *vs = &rctx->vs_shader->shader; + struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); + unsigned i, j, tmp; + + for (i = 0; i < ps->ninput; i++) { + tmp = 0; + +#if 0 + /* XXX: Flat shading hangs the GPU */ + if (ps->input[i].name == TGSI_SEMANTIC_POSITION || + ps->input[i].interpolate == TGSI_INTERPOLATE_CONSTANT || + (ps->input[i].interpolate == TGSI_INTERPOLATE_COLOR && + rctx->rasterizer && rctx->rasterizer->flatshade)) { + tmp |= S_028644_FLAT_SHADE(1); + } +#endif + + if (ps->input[i].name == TGSI_SEMANTIC_GENERIC && + rctx->sprite_coord_enable & (1 << ps->input[i].sid)) { + tmp |= S_028644_PT_SPRITE_TEX(1); + } + + for (j = 0; j < vs->noutput; j++) { + if (ps->input[i].name == vs->output[j].name && + ps->input[i].sid == vs->output[j].sid) { + tmp |= S_028644_OFFSET(vs->output[j].param_offset); + break; + } + } + + if (j == vs->noutput) { + /* No corresponding output found, load defaults into input */ + tmp |= S_028644_OFFSET(0x20); + } + + si_pm4_set_reg(pm4, R_028644_SPI_PS_INPUT_CNTL_0 + i * 4, tmp); + } + + si_pm4_set_state(rctx, spi, pm4); +} |