diff options
| author | Marek Olšák <[email protected]> | 2017-06-06 12:13:40 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-06-22 01:51:02 +0200 |
| commit | d7141d8bc0d534a1a79a2285ac6cda3838ca872e (patch) | |
| tree | f2d8986d962c675f19dcab78678a35add7345452 /src/gallium/drivers/radeonsi/si_state.c | |
| parent | 2638250fecab821c27c95d7bc48a212cd269c708 (diff) | |
radeonsi/gfx9: indirect buffers and all CP packets use TC L2
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index a0d790ac2a9..0f39ede0c7e 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -4023,7 +4023,9 @@ static void si_memory_barrier(struct pipe_context *ctx, unsigned flags) SI_CONTEXT_WRITEBACK_GLOBAL_L2; } - if (flags & PIPE_BARRIER_INDIRECT_BUFFER) + /* Indirect buffers use TC L2 on GFX9, but not older hw. */ + if (sctx->screen->b.chip_class <= VI && + flags & PIPE_BARRIER_INDIRECT_BUFFER) sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2; } |